From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: linux-amlogic@lists.infradead.org, khilman@baylibre.com
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] ARM: dts: meson8b: add power domain controller
Date: Sat, 20 Jun 2020 18:10:10 +0200 [thread overview]
Message-ID: <20200620161010.23171-4-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20200620161010.23171-1-martin.blumenstingl@googlemail.com>
The Meson8b SoCs have a power domain controller which can turn on/off
various register areas (such as: Ethernet, VPU, etc.).
Add the main "pwrc" controller and configure the Ethernet power domain.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
arch/arm/boot/dts/meson8b.dtsi | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index ba36168b9c1b..2069c57343e5 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/clock/meson8-ddr-clkc.h>
#include <dt-bindings/clock/meson8b-clkc.h>
#include <dt-bindings/gpio/meson8b-gpio.h>
+#include <dt-bindings/power/meson8-power.h>
#include <dt-bindings/reset/amlogic,meson8b-reset.h>
#include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
#include "meson.dtsi"
@@ -433,6 +434,8 @@ ðmac {
resets = <&reset RESET_ETHERNET>;
reset-names = "stmmaceth";
+
+ power-domains = <&pwrc PWRC_MESON8_ETHERNET_MEM_ID>;
};
&gpio_intc {
@@ -449,6 +452,30 @@ clkc: clock-controller {
#clock-cells = <1>;
#reset-cells = <1>;
};
+
+ pwrc: power-controller {
+ compatible = "amlogic,meson8b-pwrc";
+ #power-domain-cells = <1>;
+ amlogic,ao-sysctrl = <&pmu>;
+ resets = <&reset RESET_DBLK>,
+ <&reset RESET_PIC_DC>,
+ <&reset RESET_HDMI_APB>,
+ <&reset RESET_HDMI_SYSTEM_RESET>,
+ <&reset RESET_VENCI>,
+ <&reset RESET_VENCP>,
+ <&reset RESET_VDAC_4>,
+ <&reset RESET_VENCL>,
+ <&reset RESET_VIU>,
+ <&reset RESET_VENC>,
+ <&reset RESET_RDMA>;
+ reset-names = "dblk", "pic_dc", "hdmi_apb", "hdmi_system",
+ "venci", "vencp", "vdac", "vencl", "viu",
+ "venc", "rdma";
+ clocks = <&clkc CLKID_VPU>;
+ clock-names = "vpu";
+ assigned-clocks = <&clkc CLKID_VPU>;
+ assigned-clock-rates = <182142857>;
+ };
};
&hwrng {
--
2.27.0
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next prev parent reply other threads:[~2020-06-20 16:11 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-20 16:10 [PATCH 0/3] ARM: dts: wire up the power domains on Meson8/8b/8m2 Martin Blumenstingl
2020-06-20 16:10 ` [PATCH 1/3] ARM: dts: meson8: add power domain controller Martin Blumenstingl
2020-06-20 16:10 ` [PATCH 2/3] ARM: dts: meson8m2: add resets for the " Martin Blumenstingl
2020-06-20 16:10 ` Martin Blumenstingl [this message]
2020-07-13 19:03 ` [PATCH 0/3] ARM: dts: wire up the power domains on Meson8/8b/8m2 Kevin Hilman
2020-07-13 19:21 ` patchwork-bot+linux-amlogic
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