From: Jerome Brunet <jbrunet@baylibre.com>
To: Neil Armstrong <narmstrong@baylibre.com>, linux-clk@vger.kernel.org
Cc: Kevin Hilman <khilman@baylibre.com>,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, Jerome Brunet <jbrunet@baylibre.com>
Subject: [PATCH 0/3] clk: meson: axg-audio: fix tdmout sclk inverter
Date: Wed, 29 Jul 2020 17:43:56 +0200 [thread overview]
Message-ID: <20200729154359.1983085-1-jbrunet@baylibre.com> (raw)
The patchset fixes a problem with TDMOUT sclk inverter found on the
g12a and following SoCs.
On the the axg, a single bit was enough to drive the inverter. On
the g12a a bit was added to, somehow, change how the clock is sampled.
For the inverter to behave as intended, the new bit should be the
inverse of the inverter bit at all time.
Quite a lot of lines for a single bit ...
Jerome Brunet (3):
clk: meson: add sclk-ws driver
clk: meson: axg-audio: separate axg and g12a regmap tables
clk: meson: axg-audio: fix g12a tdmout sclk inverter
drivers/clk/meson/axg-audio.c | 214 +++++++++++++++++++++++++++++-----
drivers/clk/meson/clk-phase.c | 56 +++++++++
drivers/clk/meson/clk-phase.h | 6 +
3 files changed, 246 insertions(+), 30 deletions(-)
--
2.25.4
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next reply other threads:[~2020-07-29 15:44 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-29 15:43 Jerome Brunet [this message]
2020-07-29 15:43 ` [PATCH 1/3] clk: meson: add sclk-ws driver Jerome Brunet
2020-07-29 15:43 ` [PATCH 2/3] clk: meson: axg-audio: separate axg and g12a regmap tables Jerome Brunet
2020-07-29 15:43 ` [PATCH 3/3] clk: meson: axg-audio: fix g12a tdmout sclk inverter Jerome Brunet
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