From: Neil Armstrong <narmstrong@baylibre.com>
To: Andrzej Hajda <a.hajda@samsung.com>,
architt@codeaurora.org, Laurent.pinchart@ideasonboard.com
Cc: linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH RFC v2 2/8] drm/meson: add HDMI div40 TMDS mode
Date: Tue, 18 Dec 2018 14:19:52 +0100 [thread overview]
Message-ID: <2738985d-e2c6-905e-4148-69344fb50cc3@baylibre.com> (raw)
In-Reply-To: <d63e5df4-2250-178e-2b1e-3a8ac8dcb6df@samsung.com>
On 18/12/2018 13:36, Andrzej Hajda wrote:
> On 30.11.2018 14:42, Neil Armstrong wrote:
>> Add support for TMDS Clock > 3.4GHz for HDMI2.0 display modes.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>> drivers/gpu/drm/meson/meson_dw_hdmi.c | 24 ++++++++++++++++++++----
>> 1 file changed, 20 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
>> index 807111ebfdd9..b8775102b100 100644
>> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
>> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
>> @@ -365,7 +365,8 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
>> unsigned int wr_clk =
>> readl_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING));
>>
>> - DRM_DEBUG_DRIVER("%d:\"%s\"\n", mode->base.id, mode->name);
>> + DRM_DEBUG_DRIVER("%d:\"%s\" div%d\n", mode->base.id, mode->name,
>> + mode->clock > 340000 ? 40 : 10);
>>
>> /* Enable clocks */
>> regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100);
>> @@ -385,9 +386,17 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
>> /* Enable normal output to PHY */
>> dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12));
>>
>> - /* TMDS pattern setup (TOFIX pattern for 4k2k scrambling) */
>> - dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01, 0x001f001f);
>> - dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23, 0x001f001f);
>> + /* TMDS pattern setup (TOFIX Handle the YUV420 case) */
>> + if (mode->clock > 340000) {
>> + dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01, 0);
>> + dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23,
>> + 0x03ff03ff);
>> + } else {
>> + dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01,
>> + 0x001f001f);
>> + dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23,
>> + 0x001f001f);
>> + }
>>
>> /* Load TMDS pattern */
>> dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_CNTL, 0x1);
>> @@ -413,6 +422,8 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
>> /* Disable clock, fifo, fifo_wr */
>> regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0);
>>
>> + dw_hdmi_set_high_tmds_clock_ratio(hdmi);
>> +
>> msleep(100);
>>
>> /* Reset PHY 3 times in a row */
>> @@ -562,6 +573,11 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
>> mode->vdisplay, mode->vsync_start,
>> mode->vsync_end, mode->vtotal, mode->type, mode->flags);
>>
>> + /* If sink max TMDS clock < 340MHz, we reject the HDMI2.0 modes */
>> + if (mode->clock > 340000 &&
>> + connector->display_info.max_tmds_clock < 340000)
>> + return MODE_BAD;
>> +
>
>
> Why not just:
>
> if (mode->clock > connector->display_info.max_tmds_clock)
> return MODE_BAD;
Hmm, let me check, it may be better indeed.
Neil
>
>
> Regards
>
> Andrzej
>
>
>> /* Check against non-VIC supported modes */
>> if (!vic) {
>> status = meson_venc_hdmi_supported_mode(mode);
>
>
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next prev parent reply other threads:[~2018-12-18 13:20 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20181130134301.17963-1-narmstrong@baylibre.com>
[not found] ` <20181130134301.17963-7-narmstrong@baylibre.com>
2018-12-14 12:13 ` [PATCH RFC v2 6/8] drm/bridge: dw-hdmi: allow ycbcr420 modes for >= 0x200a Heiko Stuebner
[not found] ` <20181130134301.17963-2-narmstrong@baylibre.com>
2018-12-14 12:12 ` [PATCH RFC v2 1/8] drm/bridge: dw-hdmi: Add SCDC and TMDS Scrambling support Heiko Stuebner
2018-12-18 12:25 ` Andrzej Hajda
2018-12-18 13:17 ` Neil Armstrong
[not found] ` <CGME20181130134341epcas3p47020dea94fe298a3a58ab3007bfd5d75@epcas3p4.samsung.com>
[not found] ` <20181130134301.17963-3-narmstrong@baylibre.com>
2018-12-18 12:36 ` [PATCH RFC v2 2/8] drm/meson: add HDMI div40 TMDS mode Andrzej Hajda
2018-12-18 13:19 ` Neil Armstrong [this message]
[not found] ` <CGME20181130134343epcas3p10313babda35e397cd1218af8ba3e1dbd@epcas3p1.samsung.com>
[not found] ` <20181130134301.17963-4-narmstrong@baylibre.com>
2018-12-18 12:37 ` [PATCH RFC v2 3/8] drm/meson: add support for HDMI2.0 2160p modes Andrzej Hajda
[not found] ` <20181130134301.17963-5-narmstrong@baylibre.com>
2018-12-14 12:13 ` [PATCH RFC v2 4/8] drm/bridge: dw-hdmi: add support for YUV420 output Heiko Stuebner
2018-12-18 13:41 ` Andrzej Hajda
[not found] ` <20181130134301.17963-6-narmstrong@baylibre.com>
2018-12-14 12:13 ` [PATCH RFC v2 5/8] drm/bridge: dw-hdmi: support dynamically get input/out color info Heiko Stuebner
2018-12-19 7:26 ` Andrzej Hajda
2018-12-19 7:50 ` Laurent Pinchart
2018-12-20 7:37 ` Neil Armstrong
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