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Thu, 10 Jan 2019 06:03:15 -0600 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Thu, 10 Jan 2019 06:03:13 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Thu, 10 Jan 2019 06:03:13 -0600 Received: from [127.0.0.1] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0AC2v7G011148; Thu, 10 Jan 2019 06:02:58 -0600 Subject: Re: [PATCH] arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string To: Nishanth Menon , Rob Herring References: <20190109202934.29304-1-robh@kernel.org> <20190110022709.kh5vlave65jn7m4g@kahuna> From: Tero Kristo Message-ID: <4c934f57-5e99-1224-ae25-8384f8d5eb27@ti.com> Date: Thu, 10 Jan 2019 14:02:12 +0200 User-Agent: Mozilla/5.0 (X11; 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charset="us-ascii"; Format="flowed" Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On 10/01/2019 04:27, Nishanth Menon wrote: > On 14:29-20190109, Rob Herring wrote: >> The 'arm,armv8' compatible string is only for software models. It adds >> little value otherwise and is inconsistently used as a fallback on some >> platforms. Remove it from those platforms. >> >> This fixes warnings generated by the DT schema. >> >> Reported-by: Michal Simek >> Cc: Mark Rutland >> Cc: Will Deacon >> Signed-off-by: Rob Herring >> --- > [...] > > ARM SoC maintainers, At least on a quick look (I could be wrong), I > think we don't have any explicit processor bindings documentation. > > However, most of SoC folks seem to key off matches else where I > guess.. > > Not sure, while at this, you if you are planning on fixing up > Documentation/devicetree/bindings/arm/arm-boards: > compatible = "arm,cortex-a53","arm,armv8"; > Documentation/devicetree/bindings/arm/cpu-capacity.txt: > compatible = "arm,cortex-a53","arm,armv8"; > > Anyways, for TI SoC: > >> arch/arm64/boot/dts/ti/k3-am654.dtsi | 8 +- >> diff --git a/arch/arm64/boot/dts/ti/k3-am654.dtsi b/arch/arm64/boot/dts/ti/k3-am654.dtsi >> index 2affa6f6617e..b221abf43ac2 100644 >> --- a/arch/arm64/boot/dts/ti/k3-am654.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-am654.dtsi >> @@ -34,7 +34,7 @@ >> }; >> >> cpu0: cpu@0 { >> - compatible = "arm,cortex-a53", "arm,armv8"; >> + compatible = "arm,cortex-a53"; >> reg = <0x000>; >> device_type = "cpu"; >> enable-method = "psci"; >> @@ -48,7 +48,7 @@ >> }; >> >> cpu1: cpu@1 { >> - compatible = "arm,cortex-a53", "arm,armv8"; >> + compatible = "arm,cortex-a53"; >> reg = <0x001>; >> device_type = "cpu"; >> enable-method = "psci"; >> @@ -62,7 +62,7 @@ >> }; >> >> cpu2: cpu@100 { >> - compatible = "arm,cortex-a53", "arm,armv8"; >> + compatible = "arm,cortex-a53"; >> reg = <0x100>; >> device_type = "cpu"; >> enable-method = "psci"; >> @@ -76,7 +76,7 @@ >> }; >> >> cpu3: cpu@101 { >> - compatible = "arm,cortex-a53", "arm,armv8"; >> + compatible = "arm,cortex-a53"; >> reg = <0x101>; >> device_type = "cpu"; >> enable-method = "psci"; > > Acked-by: Nishanth Menon > TI portion looks fine to me also, so: Acked-by: Tero Kristo -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic