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[82.243.161.21]) by smtp.gmail.com with ESMTPSA id l21sm7128970wmh.35.2019.05.11.10.27.50 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Sat, 11 May 2019 10:27:50 -0700 (PDT) Message-ID: <7244c6d3e81e7bbb84ac508399ab64e236051673.camel@baylibre.com> Subject: Re: [PATCH 2/5] arm64: dts: meson: g12a: add ethernet pinctrl definitions From: Jerome Brunet To: Martin Blumenstingl Date: Sat, 11 May 2019 19:27:49 +0200 In-Reply-To: References: <20190510164940.13496-1-jbrunet@baylibre.com> <20190510164940.13496-3-jbrunet@baylibre.com> User-Agent: Evolution 3.30.5 (3.30.5-1.fc29) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190511_102753_363129_038C09AD X-CRM114-Status: GOOD ( 15.58 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Hilman , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Sat, 2019-05-11 at 19:06 +0200, Martin Blumenstingl wrote: > Hi Jerome, > > On Fri, May 10, 2019 at 6:49 PM Jerome Brunet wrote: > > Add the ethernet pinctrl settings for RMII, RGMII and internal phy leds > > > > Signed-off-by: Jerome Brunet > > --- > > arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 37 +++++++++++++++++++++ > > 1 file changed, 37 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi > > index a32db09809f7..fe0f73730525 100644 > > --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi > > +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi > > @@ -206,6 +206,43 @@ > > }; > > }; > > > > + eth_leds_pins: eth-leds { > > + mux { > > + groups = "eth_link_led", > > + "eth_act_led"; > > + function = "eth"; > > + bias-disable; > > + }; > > + }; > > + > > + eth_rmii_pins: eth-rmii { > > + mux { > > + groups = "eth_mdio", > > + "eth_mdc", > > + "eth_rgmii_rx_clk", > > + "eth_rx_dv", > > + "eth_rxd0", > > + "eth_rxd1", > > + "eth_txen", > > + "eth_txd0", > > + "eth_txd1"; > > + function = "eth"; > > + bias-disable; > > + }; > > + }; > > + > > + eth_rgmii_pins: eth-rgmii { > > + mux { > > + groups = "eth_rxd2_rgmii", > > + "eth_rxd3_rgmii", > > + "eth_rgmii_tx_clk", > > + "eth_txd2_rgmii", > > + "eth_txd3_rgmii"; > > + function = "eth"; > > + bias-disable; > > + }; > > + }; > it seems that the group definition is incomplete (missing things like > eth_mdc, eth_rx_dv, ...) > > we could also mix the eth_rmii_pins and eth_rgmii_pins in a board.dts > (maybe that was your idea in the first place?): yes that's the idea > phy-mode = "rgmii"; > pinctrl-0 = <ð_rmii_pins>, <ð_rgmii_pins>; > pinctrl-names = "default"; > however, in this case I would prefer if "eth_rmii_pins" was named only > "eth_pins" (following mostly what Amlogic does with the pin group > naming: eth_* for pins that are valid in both, rmii and rgmii mode and > eth*rgmii* for pins that are only valid in rgmii mode) I can't say I share your preference. I let Kevin decide what he wants. > > > Regards > Martin _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic