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[71.197.186.152]) by smtp.gmail.com with ESMTPSA id 144sm16256684pfc.124.2020.01.13.15.40.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 13 Jan 2020 15:40:21 -0800 (PST) From: Kevin Hilman To: Jianxin Pan , linux-amlogic@lists.infradead.org Subject: Re: [PATCH v5 0/4] arm64: meson: add support for A1 Power Domains In-Reply-To: <1573532930-39505-1-git-send-email-jianxin.pan@amlogic.com> References: <1573532930-39505-1-git-send-email-jianxin.pan@amlogic.com> Date: Mon, 13 Jan 2020 15:40:21 -0800 Message-ID: <7h7e1vdixm.fsf@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200113_154022_747214_ADDC0E1F X-CRM114-Status: UNSURE ( 6.23 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Hanjie Lin , Victor Wan , Jianxin Pan , linux-pm@vger.kernel.org, Martin Blumenstingl , Neil Armstrong , linux-kernel@vger.kernel.org, Rob Herring , Jian Hu , Xingyu Chen , linux-arm-kernel@lists.infradead.org, Jerome Brunet Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Jianxin Pan writes: > This patchset introduces a "Secure Power Doamin Controller". In A1/C1, power > controller registers such as PWRCTRL_FOCRSTN, PWRCTRL_PWR_OFF, PWRCTRL_MEM_PD > and PWRCTRL_ISO_EN, are in the secure domain, and should be accessed from ATF > by smc. > > Changes since v4 at [3]: > - add SM_A1_ prefix for PWRC_SET/GET > - rename variable and update comments Thanks for those updates After the bindings issues are worked out, this is ready for merge. Kevin _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic