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[71.197.186.152]) by smtp.gmail.com with ESMTPSA id 17sm4363066pfv.142.2019.12.10.10.15.46 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 10 Dec 2019 10:15:46 -0800 (PST) From: Kevin Hilman To: Jian Hu , Jerome Brunet , Neil Armstrong Subject: Re: [PATCH] arm64: dts: meson-a1: add I2C nodes In-Reply-To: References: <20191202111253.94872-1-jian.hu@amlogic.com> <7hsgltqfdx.fsf@baylibre.com> Date: Tue, 10 Dec 2019 10:15:45 -0800 Message-ID: <7hblsgqc6m.fsf@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191210_101548_625124_A7A018BC X-CRM114-Status: GOOD ( 17.30 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Rob Herring , Jianxin Pan , Wolfram Sang , Martin Blumenstingl , Michael Turquette , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-i2c@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Jian Hu writes: > Hi Kevin > > Thanks for your review > > On 2019/12/10 6:54, Kevin Hilman wrote: >> Hi Jian, >> >> Jian Hu writes: >> >>> There are four I2C controllers in A1 series, >>> Share the same comptible with AXG.The I2C nodes >>> depend on pinmux and clock controller. >>> >>> Signed-off-by: Jian Hu >>> --- >>> arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 149 ++++++++++++++++++++++ >>> 1 file changed, 149 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi >>> index eab2ecd36aa8..d0a73d953f5e 100644 >>> --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi >>> +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi >>> @@ -16,6 +16,13 @@ >>> #address-cells = <2>; >>> #size-cells = <2>; >>> >>> + aliases { >>> + i2c0 = &i2c0; >>> + i2c1 = &i2c1; >>> + i2c2 = &i2c2; >>> + i2c3 = &i2c3; >>> + }; >>> + >>> cpus { >>> #address-cells = <2>; >>> #size-cells = <0>; >>> @@ -117,6 +124,46 @@ >>> }; >>> }; >>> >>> + i2c0: i2c@1400 { >>> + compatible = "amlogic,meson-axg-i2c"; >>> + reg = <0x0 0x1400 0x0 0x24>; >> >> The AXG DT files use 0x20 for the length. You are using 0x24. I don't >> see any additional registers added to the driver, so this doesn't look right. > In fact, For G12 series and A1, the length should be 0x24. A new > register is added, And it is for IRQ handler timeout. If the > transmission is exceeding a limited time, it will abort the > transmission.Now the function is not used, There is completion to deal > the timeout in the driver. I will set the length 0x20 becouse of the new > register is not used. Yes, we can extend it to 0x24 when support for the new register is added, because that will mean adding a new compatible string also. >> >>> + interrupts = ; >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + clocks = <&clkc_periphs CLKID_I2C_M_A>; >>> + status = "disabled"; >>> + }; >>> + >>> + i2c1: i2c@5c00 { >>> + compatible = "amlogic,meson-axg-i2c"; >>> + reg = <0x0 0x5c00 0x0 0x24>; >>> + interrupts = ; >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + clocks = <&clkc_periphs CLKID_I2C_M_B>; >>> + status = "disabled"; >>> + }; >>> + >>> + i2c2: i2c@6800 { >>> + compatible = "amlogic,meson-axg-i2c"; >>> + reg = <0x0 0x6800 0x0 0x24>; >>> + interrupts = ; >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + clocks = <&clkc_periphs CLKID_I2C_M_C>; >>> + status = "disabled"; >>> + }; >>> + >>> + i2c3: i2c@6c00 { >>> + compatible = "amlogic,meson-axg-i2c"; >>> + reg = <0x0 0x6c00 0x0 0x24>; >>> + interrupts = ; >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + clocks = <&clkc_periphs CLKID_I2C_M_D>; >>> + status = "disabled"; >>> + }; >>> + >>> uart_AO: serial@1c00 { >>> compatible = "amlogic,meson-gx-uart", >>> "amlogic,meson-ao-uart"; >>> @@ -171,3 +218,105 @@ >>> #clock-cells = <0>; >>> }; >>> }; >>> + >>> +&periphs_pinctrl { >>> + i2c0_f11_pins:i2c0-f11 { >>> + mux { >>> + groups = "i2c0_sck_f11", >>> + "i2c0_sda_f12"; >>> + function = "i2c0"; >>> + bias-pull-up; >>> + drive-strength-microamp = <3000>; >> >> Can you also add some comment to the changelog about the need for >> drive-strength compared to AXG. > > OK, Drive strength function is added for GPIO pins from G12 series. > So does A1 series. Yes, that's what I assumed. Please add that to the changelog as one of the new features in A1 compared to AXG. Thanks, Kevin _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic