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[71.197.186.152]) by smtp.googlemail.com with ESMTPSA id m67sm110315606pfm.73.2019.01.11.10.06.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 11 Jan 2019 10:06:55 -0800 (PST) From: Kevin Hilman To: Emiliano Ingrassia , Martin Blumenstingl , linux-amlogic@lists.infradead.org Subject: Re: [PATCH v3 1/2] pinctrl: meson: meson8b: add the eth_rxd2 and eth_rxd3 pins In-Reply-To: <20190111100915.GA1716@ingrassia.epigenesys.com> References: <20181229143556.27339-1-martin.blumenstingl@googlemail.com> <20181229143556.27339-2-martin.blumenstingl@googlemail.com> <7hzhs8ovag.fsf@baylibre.com> <20190111100915.GA1716@ingrassia.epigenesys.com> Date: Fri, 11 Jan 2019 10:06:54 -0800 Message-ID: <7hbm4noypt.fsf@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190111_100657_443560_36AD8BB3 X-CRM114-Status: GOOD ( 15.79 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, jianxin.pan@amlogic.com, linus.luessing@c0d3.blue Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Emiliano Ingrassia writes: > Hi Kevin, > > sorry to bother you. No need to apologize. > On Thu, Jan 10, 2019 at 05:08:39PM -0800, Kevin Hilman wrote: >> Martin Blumenstingl writes: >> >> > Gigabit Ethernet requires the Ethernet TXD0..3 and RXD0..3 data lines. >> > Add the missing eth_rxd2 and eth_rxd3 definitions so we don't have to >> > rely on the bootloader to set them up correctly. >> > >> > The vendor u-boot sources for Odroid-C1 use the following Ethernet >> > pinmux configuration: >> > SET_CBUS_REG_MASK(PERIPHS_PIN_MUX_6, 0x3f4f); >> > SET_CBUS_REG_MASK(PERIPHS_PIN_MUX_7, 0xf00000); >> > This translates to the following pin groups in the mainline kernel: >> > - register 6 bit 0: eth_rxd1 (DIF_0_P) >> > - register 6 bit 1: eth_rxd0 (DIF_0_N) >> > - register 6 bit 2: eth_rx_dv (DIF_1_P) >> > - register 6 bit 3: eth_rx_clk (DIF_1_N) >> > - register 6 bit 6: eth_tx_en (DIF_3_P) >> > - register 6 bit 8: eth_ref_clk (DIF_3_N) >> > - register 6 bit 9: eth_mdc (DIF_4_P) >> > - register 6 bit 10: eth_mdio_en (DIF_4_N) >> > - register 6 bit 11: eth_tx_clk (GPIOH_9) >> > - register 6 bit 12: eth_txd2 (GPIOH_8) >> > - register 6 bit 13: eth_txd3 (GPIOH_7) >> > - register 7 bit 20: eth_txd0_0 (GPIOH_6) >> > - register 7 bit 21: eth_txd1_0 (GPIOH_5) >> > - register 7 bit 22: eth_rxd3 (DIF_2_P) >> > - register 7 bit 23: eth_rxd2 (DIF_2_N) >> > >> > All functions except eth_rxd2 and eth_rxd3 are already supported by the >> > pinctrl-meson8b driver. >> > >> > Suggested-by: Jianxin Pan >> > Signed-off-by: Martin Blumenstingl >> >> Reviewed-by: Kevin Hilman > > For both patches of this series I gave: > Tested-by: Emiliano Ingrassia > Reviewed-by: Emiliano Ingrassia > > They were in the answer to the cover letter of this series. > I note that they were not included in the commit message of the first patch. > > Did I miss something or did something wrong? > Please, let me know. You did everything fine, I just missed them. I've started relying a bit more heavily on patchwork to collect review/test tags, and right now it doesn't notice tags to the cover-letter, only to individual patches, so I typically add those by hand, but in this case I missed them. Sorry about that, and thanks for the reminder. I'll add them and repush. And, while I'm thinking about it, I'll request that feature to patchwork developers. Kevin _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic