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From: Kevin Hilman <khilman@baylibre.com>
To: Jianxin Pan <jianxin.pan@amlogic.com>, linux-amlogic@lists.infradead.org
Cc: devicetree@vger.kernel.org, Hanjie Lin <hanjie.lin@amlogic.com>,
	Victor Wan <victor.wan@amlogic.com>,
	Jianxin Pan <jianxin.pan@amlogic.com>,
	linux-pm@vger.kernel.org,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
	Jian Hu <jian.hu@amlogic.com>,
	Xingyu Chen <xingyu.chen@amlogic.com>,
	linux-arm-kernel@lists.infradead.org,
	Jerome Brunet <jbrunet@baylibre.com>
Subject: Re: [PATCH v6 0/4] arm64: meson: add support for A1 Power Domains
Date: Fri, 14 Feb 2020 11:14:46 -0800
Message-ID: <7hd0ahasm1.fsf@baylibre.com> (raw)
In-Reply-To: <1579087831-94965-1-git-send-email-jianxin.pan@amlogic.com>

Jianxin Pan <jianxin.pan@amlogic.com> writes:

> This patchset introduces a "Secure Power Doamin Controller". In A1/C1, power
> controller registers such as PWRCTRL_FOCRSTN, PWRCTRL_PWR_OFF, PWRCTRL_MEM_PD
> and PWRCTRL_ISO_EN, are in the secure domain, and should be accessed from ATF
> by smc.

Series queued for v5.7 with Rob's ack on the DT bindings.

Thanks,

Kevin

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  parent reply index

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-15 11:30 Jianxin Pan
2020-01-15 11:30 ` [PATCH v6 1/4] firmware: meson_sm: Add secure power domain support Jianxin Pan
2020-01-15 11:30 ` [PATCH v6 2/4] dt-bindings: power: add Amlogic secure power domains bindings Jianxin Pan
2020-01-15 20:18   ` Rob Herring
2020-02-20 13:27   ` Rob Herring
2020-02-21  7:14     ` Jianxin Pan
2020-01-15 11:30 ` [PATCH v6 3/4] soc: amlogic: Add support for Secure power domains controller Jianxin Pan
2020-01-15 11:30 ` [PATCH v6 4/4] arm64: dts: meson: a1: add secure power domain controller Jianxin Pan
2020-02-14 19:14 ` Kevin Hilman [this message]
2020-02-14 22:41 ` [PATCH v6 0/4] arm64: meson: add support for A1 Power Domains patchwork-bot+linux-amlogic

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