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Tue, 16 Apr 2019 12:01:53 -0700 (PDT) From: Kevin Hilman To: Martin Blumenstingl , linux-amlogic@lists.infradead.org Subject: Re: [PATCH 0/3] Meson8b: add support for the RTC on EC-100 and Odroid-C1 In-Reply-To: <20190413163423.15149-1-martin.blumenstingl@googlemail.com> References: <20190413163423.15149-1-martin.blumenstingl@googlemail.com> Date: Tue, 16 Apr 2019 12:01:52 -0700 Message-ID: <7hr2a1ojtr.fsf@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190416_120154_805263_E26A9BC5 X-CRM114-Status: UNSURE ( 9.99 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , jianxin.pan@amlogic.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, ccaione@baylibre.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Martin Blumenstingl writes: > This adds support for the RTC on the Meson8b EC-100 and Odroid-C1 > boards. Example kernel log snippet while booting my EC-100: > [ 5.713750] meson-rtc c8100740.rtc: setting system clock to 2019-04-13T16:21:48 UTC (1555172508) > > I am only 99% sure about the naming of the clock in patch 2 and 3. > The public S805 datasheet from Hardkernel shows (on page 24 for example) > that clk81 can use "XTAL/32khz" as clock input. That "XTAL/32khz" clock > is described as a mux between 24MHz (our main XTAL) and 32kHz ("that > other XTAL"). > I believe that this other 32kHz XTAL is NOT the RTC32K crystal because: > - schematics of the EC-100 and Odroid-C1 clearly show that the SoC input > for the RTC32K clock is labeled RTC32K_XI / RTC32K_XO > - GPIOAO_6 has a CLK_32KIN function (shows in EC-100 and Odroid-C1 > schematics as well as the public S805 datasheet) > - Always On domain PWR_CNTL0[11:10] (public S805 datasheet page 19) > describes it as "Alternate 32khz input clock select from GPIO pad" > > Thus I believe that the naming of the RTC32K clock is correct, but I > wanted to point out that I'm only 99% (instead of 100%) sure. > Jianxin, please let me know if you disagree with my findings. 99% confidence is higher than we normally have, so that's fine by me. :) And, we can fix if we get any updated info from Jianxin. Thanks for the detailed description. Queuing for v5.2, Kevin _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic