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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Jianxin Pan <jianxin.pan@amlogic.com>
Cc: devicetree@vger.kernel.org, Hanjie Lin <hanjie.lin@amlogic.com>,
	Victor Wan <victor.wan@amlogic.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	linux-kernel@vger.kernel.org,
	Qiufang Dai <qiufang.dai@amlogic.com>,
	Rob Herring <robh+dt@kernel.org>, Jian Hu <jian.hu@amlogic.com>,
	Xingyu Chen <xingyu.chen@amlogic.com>,
	Tao Zeng <tao.zeng@amlogic.com>, Carlo Caione <carlo@caione.org>,
	linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	Jerome Brunet <jbrunet@baylibre.com>
Subject: Re: [PATCH v2 4/4] arm64: dts: add support for A1 based Amlogic AD401
Date: Thu, 5 Sep 2019 22:15:34 +0200	[thread overview]
Message-ID: <CAFBinCBSmW4y-Dz7EkJMV8HOU4k6Z0G-K6T77XnVrHyubaSsdg@mail.gmail.com> (raw)
In-Reply-To: <1567667251-33466-5-git-send-email-jianxin.pan@amlogic.com>

Hi Jianxin,

(it's great to see that you and your team are upstreaming this early)

On Thu, Sep 5, 2019 at 9:08 AM Jianxin Pan <jianxin.pan@amlogic.com> wrote:
[...]
> +       memory@0 {
> +               device_type = "memory";
> +               reg = <0x0 0x0 0x0 0x8000000>;
> +               /*linux,usable-memory = <0x0 0x0 0x0 0x8000000>;*/
why do we need that comment here (I don't understand it - why doesn't
the "reg" property cover this)?

> +       };
> +};
> +
> +&uart_AO_B {
> +       status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> new file mode 100644
> index 00000000..4d476ac
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> @@ -0,0 +1,122 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/ {
> +       compatible = "amlogic,a1";
> +
> +       interrupt-parent = <&gic>;
> +       #address-cells = <2>;
> +       #size-cells = <2>;
> +
> +       cpus {
> +               #address-cells = <0x2>;
> +               #size-cells = <0x0>;
only now I notice that all our other .dtsi also use hex values
(instead of decimal as just a few lines above) here
do you know if there is a particular reason for this?

[...]
> +               uart_AO_B: serial@fe002000 {
> +                       compatible = "amlogic,meson-gx-uart",
> +                                    "amlogic,meson-ao-uart";
> +                                    reg = <0x0 0xfe002000 0x0 0x18>;
the indentation of the "reg" property is off here

also I'm a bit surprised to see no busses (like aobus, cbus, periphs, ...) here
aren't there any busses defined in the A1 SoC implementation or are
were you planning to add them later?


Martin

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  reply	other threads:[~2019-09-05 20:15 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-05  7:07 [PATCH v2 0/4] arm64: Add basic support for Amlogic A1 SoC Family Jianxin Pan
2019-09-05  7:07 ` [PATCH v2 1/4] soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs Jianxin Pan
2019-09-05  7:07 ` [PATCH v2 2/4] dt-bindings: arm: amlogic: add A1 bindings Jianxin Pan
2019-09-05  7:07 ` [PATCH v2 3/4] dt-bindings: arm: amlogic: add Amlogic AD401 bindings Jianxin Pan
2019-09-05  7:07 ` [PATCH v2 4/4] arm64: dts: add support for A1 based Amlogic AD401 Jianxin Pan
2019-09-05 20:15   ` Martin Blumenstingl [this message]
2019-09-06  5:59     ` Jianxin Pan
2019-09-07 15:02       ` Martin Blumenstingl
2019-09-09 11:36         ` Jerome Brunet
2019-09-09 16:12           ` Jianxin Pan
2019-09-09 12:04         ` Jianxin Pan
2019-09-09 17:24           ` Martin Blumenstingl
2019-09-11  7:37             ` Jianxin Pan

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