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* [PATCH] pinctrl: meson-gxl: fix GPIOX sdio pins
@ 2020-02-05 11:22 Nicolas Belin
  2020-02-05 12:18 ` Jerome Brunet
  2020-02-19 16:23 ` Linus Walleij
  0 siblings, 2 replies; 3+ messages in thread
From: Nicolas Belin @ 2020-02-05 11:22 UTC (permalink / raw)
  To: linus.walleij; +Cc: Kevin Hilman, linux-amlogic, linux-kernel, linux-gpio

In the gxl driver, the sdio cmd and clk pins are inverted. It has not caused
any issue so far because devices using these pins always take both pins
so the resulting configuration is OK.

Fixes: 0f15f500ff2c ("pinctrl: meson: Add GXL pinctrl definitions")
Signed-off-by: Nicolas Belin <nbelin@baylibre.com>
---
 drivers/pinctrl/meson/pinctrl-meson-gxl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index 72c5373c8dc1..e8d1f3050487 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -147,8 +147,8 @@ static const unsigned int sdio_d0_pins[]    = { GPIOX_0 };
 static const unsigned int sdio_d1_pins[]       = { GPIOX_1 };
 static const unsigned int sdio_d2_pins[]       = { GPIOX_2 };
 static const unsigned int sdio_d3_pins[]       = { GPIOX_3 };
-static const unsigned int sdio_cmd_pins[]      = { GPIOX_4 };
-static const unsigned int sdio_clk_pins[]      = { GPIOX_5 };
+static const unsigned int sdio_clk_pins[]      = { GPIOX_4 };
+static const unsigned int sdio_cmd_pins[]      = { GPIOX_5 };
 static const unsigned int sdio_irq_pins[]      = { GPIOX_7 };

 static const unsigned int nand_ce0_pins[]      = { BOOT_8 };
--

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2020-02-05 11:22 [PATCH] pinctrl: meson-gxl: fix GPIOX sdio pins Nicolas Belin
2020-02-05 12:18 ` Jerome Brunet
2020-02-19 16:23 ` Linus Walleij

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