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From: Rob Herring <robh@kernel.org>
To: Michael Ellerman <mpe@ellerman.id.au>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,
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Subject: Re: [PATCH 01/13] PCI: dwc/imx6: Drop setting PCI_MSI_FLAGS_ENABLE
Date: Thu, 29 Oct 2020 08:01:35 -0500
Message-ID: <CAL_JsqJWzmGNifrJEKGg582kZNtjnWHaUkG0EinWqjhGaeL1dg@mail.gmail.com> (raw)
In-Reply-To: <87h7qdx4oz.fsf@mpe.ellerman.id.au>

On Wed, Oct 28, 2020 at 7:21 PM Michael Ellerman <mpe@ellerman.id.au> wrote:
>
> Rob Herring <robh@kernel.org> writes:
> > No other host driver sets the PCI_MSI_FLAGS_ENABLE bit, so it must not
> > be necessary. If it is, a comment is needed.
>
> Yeah, but git blame directly points to:
>
>   75cb8d20c112 ("PCI: imx: Enable MSI from downstream components")

I think I did read this at some point and then forgot about it when I
made the change later...

> Which has a pretty long explanation. The relevant bit probably being:
>
>   ... on i.MX6, the MSI Enable bit controls delivery of MSI interrupts
>   from components below the Root Port.

The thing is that all seems not i.MX6 specific but DWC specific given
MSI handling is contained within the DWC block. So I don't see how
this could be an integration difference.

So maybe everyone else is still just setting CONFIG_PCIEPORTBUS
typically and haven't noticed? Is it correct for the host driver to
set MSI enable?

Rob

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Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-28 20:46 [PATCH 00/13] PCI: dwc: Another round of clean-ups Rob Herring
2020-10-28 20:46 ` [PATCH 01/13] PCI: dwc/imx6: Drop setting PCI_MSI_FLAGS_ENABLE Rob Herring
2020-10-29  0:21   ` Michael Ellerman
2020-10-29 13:01     ` Rob Herring [this message]
2020-10-28 20:46 ` [PATCH 02/13] PCI: dwc/intel-gw: Move ATU offset out of driver match data Rob Herring
2020-10-28 20:46 ` [PATCH 03/13] PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code Rob Herring
2020-10-29 22:09   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 04/13] PCI: dwc/intel-gw: Remove some unneeded function wrappers Rob Herring
2020-10-28 20:46 ` [PATCH 05/13] PCI: dwc: Ensure all outbound ATU windows are reset Rob Herring
2020-10-29 22:12   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 06/13] PCI: dwc/dra7xx: Use the common MSI irq_chip Rob Herring
2020-10-28 20:46 ` [PATCH 07/13] PCI: dwc: Drop the .set_num_vectors() host op Rob Herring
2020-10-29 22:15   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 08/13] PCI: dwc: Move MSI interrupt setup into DWC common code Rob Herring
2020-10-29 22:18   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 09/13] PCI: dwc: Rework MSI initialization Rob Herring
2020-10-29 22:20   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 10/13] PCI: dwc: Move link handling into common code Rob Herring
2020-10-29 22:24   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 11/13] PCI: dwc: Move dw_pcie_msi_init() into core Rob Herring
2020-10-29 22:26   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 12/13] PCI: dwc: Move dw_pcie_setup_rc() to DWC common code Rob Herring
2020-10-29 22:29   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 13/13] PCI: dwc: Remove unnecessary wrappers around dw_pcie_host_init() Rob Herring

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