* [PATCH v2 0/4] Ethernet PHY reset GPIO updates for Amlogic SoCs
@ 2019-06-12 20:55 Martin Blumenstingl
2019-06-12 20:55 ` [PATCH v2 1/4] arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line Martin Blumenstingl
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Martin Blumenstingl @ 2019-06-12 20:55 UTC (permalink / raw)
To: linux-amlogic, khilman
Cc: andrew, Martin Blumenstingl, netdev, linus.walleij, linux-kernel,
robin.murphy, linux-arm-kernel
While trying to add the Ethernet PHY interrupt on the X96 Max I found
that the current reset line definition is incorrect. Patch #1 fixes
this.
Since the fix requires moving from the deprecated "snps,reset-gpio"
property to the generic Ethernet PHY reset bindings I decided to move
all Amlogic boards over to the non-deprecated bindings. That's what
patches #2 and #3 do.
Finally I found that Odroid-N2 doesn't define the Ethernet PHY's reset
GPIO yet. I don't have that board so I can't test whether it really
works but based on the schematics it should.
This series is a partial successor to "stmmac: honor the GPIO flags
for the PHY reset GPIO" from [0]. I decided not to take Linus W.'s
Reviewed-by from patch #4 of that series because I had to change the
wording and I want to be sure that he's happy with that now.
One quick note regarding patches #1 and #4: I decided to violate the
"max 80 characters per line" (by 4 characters) limit because I find
that the result is easier to read then it would be if I split the
line.
Changes since v1 at [1]:
- fixed the reset deassert delay for RTL8211F PHYs - spotted by Robin
Murphy (thank you). according to the public RTL8211E datasheet the
correct values seem to be: 10ms assert, 30ms deassert
- fixed the reset assert and deassert delays for IP101GR PHYs. There
are two values given in the public datasheet, use the higher one
(10ms instead of 2.5)
- update the patch descriptions to quote the datasheets (the RTL8211F
quotes are taken from the public RTL8211E datasheet because as far
as I can tell the reset sequence is identical on both PHYs)
[0] https://patchwork.kernel.org/cover/10983801/
[1] https://patchwork.kernel.org/cover/10985155/
Martin Blumenstingl (4):
arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line
ARM: dts: meson: switch to the generic Ethernet PHY reset bindings
arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings
arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line
arch/arm/boot/dts/meson8b-ec100.dts | 9 +++++----
arch/arm/boot/dts/meson8b-mxq.dts | 9 +++++----
arch/arm/boot/dts/meson8b-odroidc1.dts | 9 +++++----
arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 8 ++++----
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 7 ++++---
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 9 +++++----
.../arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts | 8 ++++----
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 9 +++++----
arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts | 9 +++++----
arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 9 +++++----
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi | 8 ++++----
arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts | 11 ++++++-----
arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 10 +++++-----
arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 8 ++++----
arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts | 11 ++++++-----
arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts | 8 ++++----
17 files changed, 80 insertions(+), 66 deletions(-)
--
2.22.0
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^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH v2 1/4] arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line 2019-06-12 20:55 [PATCH v2 0/4] Ethernet PHY reset GPIO updates for Amlogic SoCs Martin Blumenstingl @ 2019-06-12 20:55 ` Martin Blumenstingl 2019-06-14 9:02 ` Neil Armstrong 2019-06-12 20:55 ` [PATCH v2 2/4] ARM: dts: meson: switch to the generic Ethernet PHY reset bindings Martin Blumenstingl ` (2 subsequent siblings) 3 siblings, 1 reply; 9+ messages in thread From: Martin Blumenstingl @ 2019-06-12 20:55 UTC (permalink / raw) To: linux-amlogic, khilman Cc: andrew, Martin Blumenstingl, netdev, linus.walleij, linux-kernel, robin.murphy, linux-arm-kernel The Odroid-N2 schematics show that the following pins are used for the reset and interrupt lines: - GPIOZ_14 is the PHY interrupt line - GPIOZ_15 is the PHY reset line The GPIOZ_14 and GPIOZ_15 pins are special. The datasheet describes that they are "3.3V input tolerant open drain (OD) output pins". This means the GPIO controller can drive the output LOW to reset the PHY. To release the reset it can only switch the pin to input mode. The output cannot be driven HIGH for these pins. This requires configuring the reset line as GPIO_OPEN_DRAIN because otherwise the PHY will be stuck in "reset" state (because driving the pin HIGH seems to result in the same signal as driving it LOW). The reset line works together with a pull-up resistor (R143 in the Odroid-N2 schematics). The SoC can drive GPIOZ_14 LOW to assert the PHY reset. However, since the SoC can't drive the pin HIGH (to release the reset) we switch the mode to INPUT and let the pull-up resistor take care of driving the reset line HIGH. Switch to GPIOZ_15 for the PHY reset line instead of using GPIOZ_14 (which actually is the interrupt line). Move from the "snps" specific resets to the MDIO framework's reset-gpios because only the latter honors the GPIO flags. Use the GPIO flags (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN) to match with the pull-up resistor because this will: - drive the output LOW to reset the PHY (= active low) - switch the pin to INPUT mode so the pull-up will take the PHY out of reset Fixes: 51d116557b2044 ("arm64: dts: meson-g12a-x96-max: Add Gigabit Ethernet Support") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts index 98bc56e650a0..de58d7817836 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts @@ -176,6 +176,10 @@ reg = <0>; max-speed = <1000>; eee-broken-1000t; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; }; }; @@ -186,9 +190,6 @@ phy-mode = "rgmii"; phy-handle = <&external_phy>; amlogic,tx-delay-ns = <2>; - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; }; &pwm_ef { -- 2.22.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v2 1/4] arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line 2019-06-12 20:55 ` [PATCH v2 1/4] arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line Martin Blumenstingl @ 2019-06-14 9:02 ` Neil Armstrong 0 siblings, 0 replies; 9+ messages in thread From: Neil Armstrong @ 2019-06-14 9:02 UTC (permalink / raw) To: Martin Blumenstingl, linux-amlogic, khilman Cc: andrew, netdev, linus.walleij, linux-kernel, robin.murphy, linux-arm-kernel On 12/06/2019 22:55, Martin Blumenstingl wrote: > The Odroid-N2 schematics show that the following pins are used for the > reset and interrupt lines: > - GPIOZ_14 is the PHY interrupt line > - GPIOZ_15 is the PHY reset line > > The GPIOZ_14 and GPIOZ_15 pins are special. The datasheet describes that > they are "3.3V input tolerant open drain (OD) output pins". This means > the GPIO controller can drive the output LOW to reset the PHY. To > release the reset it can only switch the pin to input mode. The output > cannot be driven HIGH for these pins. > This requires configuring the reset line as GPIO_OPEN_DRAIN because > otherwise the PHY will be stuck in "reset" state (because driving the > pin HIGH seems to result in the same signal as driving it LOW). > > The reset line works together with a pull-up resistor (R143 in the > Odroid-N2 schematics). The SoC can drive GPIOZ_14 LOW to assert the PHY > reset. However, since the SoC can't drive the pin HIGH (to release the > reset) we switch the mode to INPUT and let the pull-up resistor take > care of driving the reset line HIGH. > > Switch to GPIOZ_15 for the PHY reset line instead of using GPIOZ_14 > (which actually is the interrupt line). > Move from the "snps" specific resets to the MDIO framework's > reset-gpios because only the latter honors the GPIO flags. > Use the GPIO flags (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN) to match with > the pull-up resistor because this will: > - drive the output LOW to reset the PHY (= active low) > - switch the pin to INPUT mode so the pull-up will take the PHY out of > reset > > Fixes: 51d116557b2044 ("arm64: dts: meson-g12a-x96-max: Add Gigabit Ethernet Support") > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts > index 98bc56e650a0..de58d7817836 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts > @@ -176,6 +176,10 @@ > reg = <0>; > max-speed = <1000>; > eee-broken-1000t; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; > }; > }; > > @@ -186,9 +190,6 @@ > phy-mode = "rgmii"; > phy-handle = <&external_phy>; > amlogic,tx-delay-ns = <2>; > - snps,reset-gpio = <&gpio GPIOZ_14 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > }; > > &pwm_ef { > Thanks for spotting this: Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 2/4] ARM: dts: meson: switch to the generic Ethernet PHY reset bindings 2019-06-12 20:55 [PATCH v2 0/4] Ethernet PHY reset GPIO updates for Amlogic SoCs Martin Blumenstingl 2019-06-12 20:55 ` [PATCH v2 1/4] arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line Martin Blumenstingl @ 2019-06-12 20:55 ` Martin Blumenstingl 2019-06-14 9:02 ` Neil Armstrong 2019-06-12 20:55 ` [PATCH v2 3/4] arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings Martin Blumenstingl 2019-06-12 20:55 ` [PATCH v2 4/4] arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line Martin Blumenstingl 3 siblings, 1 reply; 9+ messages in thread From: Martin Blumenstingl @ 2019-06-12 20:55 UTC (permalink / raw) To: linux-amlogic, khilman Cc: andrew, Martin Blumenstingl, netdev, linus.walleij, linux-kernel, robin.murphy, linux-arm-kernel The snps,reset-gpio bindings are deprecated in favour of the generic "Ethernet PHY reset" bindings. Replace snps,reset-gpio from the ðmac node with reset-gpios in the ethernet-phy node. The old snps,reset-active-low property is now encoded directly as GPIO flag inside the reset-gpios property. snps,reset-delays-us is converted to reset-assert-us and reset-deassert-us. reset-assert-us is the second cell from snps,reset-delays-us while reset-deassert-us was the third cell. Instead of blindly copying the old values (which seems strange since they gave the PHY one second to come out of reset) over this also updates the delays based on the datasheets: - RTL8211F PHY on the Odroid-C1 and MXIII-Plus needs a 10ms assert delay (the datasheet mentions: "For a complete PHY reset, this pin must be asserted low for at least 10ms") and a 30ms deassert delay (the datasheet mentions: "Wait for a further 30ms (for internal circuits settling time) before accessing the PHY register"). The old settings used 10ms for assert and 1000ms for deassert. - IP101GR PHY on the EC-100 and MXQ needs a 10ms assert delay (the datasheet mentions: "Trst | Reset period | 10ms") and a 10ms deassert delay as well (the datasheet mentions: "Tclk_MII_rdy | MII/RMII clock output ready after reset released | 10ms")). The old settings used 10ms for assert and 1000ms for deassert. No functional changes intended. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm/boot/dts/meson8b-ec100.dts | 9 +++++---- arch/arm/boot/dts/meson8b-mxq.dts | 9 +++++---- arch/arm/boot/dts/meson8b-odroidc1.dts | 9 +++++---- arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 8 ++++---- 4 files changed, 19 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts index 9bf4249cb60d..96d239d8334e 100644 --- a/arch/arm/boot/dts/meson8b-ec100.dts +++ b/arch/arm/boot/dts/meson8b-ec100.dts @@ -234,10 +234,6 @@ phy-handle = <ð_phy0>; phy-mode = "rmii"; - snps,reset-gpio = <&gpio GPIOH_4 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>; @@ -246,6 +242,11 @@ eth_phy0: ethernet-phy@0 { /* IC Plus IP101A/G (0x02430c54) */ reg = <0>; + + reset-assert-us = <10000>; + reset-deassert-us = <10000>; + reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>; + icplus,select-interrupt; interrupt-parent = <&gpio_intc>; /* GPIOH_3 */ diff --git a/arch/arm/boot/dts/meson8b-mxq.dts b/arch/arm/boot/dts/meson8b-mxq.dts index ef602ab45efd..bb27b34eb346 100644 --- a/arch/arm/boot/dts/meson8b-mxq.dts +++ b/arch/arm/boot/dts/meson8b-mxq.dts @@ -91,10 +91,6 @@ phy-handle = <ð_phy0>; phy-mode = "rmii"; - snps,reset-gpio = <&gpio GPIOH_4 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>; @@ -103,6 +99,11 @@ eth_phy0: ethernet-phy@0 { /* IC Plus IP101A/G (0x02430c54) */ reg = <0>; + + reset-assert-us = <10000>; + reset-deassert-us = <10000>; + reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>; + icplus,select-interrupt; interrupt-parent = <&gpio_intc>; /* GPIOH_3 */ diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts index 018695b2b83a..86c4614e0a38 100644 --- a/arch/arm/boot/dts/meson8b-odroidc1.dts +++ b/arch/arm/boot/dts/meson8b-odroidc1.dts @@ -176,10 +176,6 @@ ðmac { status = "okay"; - snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 30000>; - pinctrl-0 = <ð_rgmii_pins>; pinctrl-names = "default"; @@ -195,6 +191,11 @@ /* Realtek RTL8211F (0x001cc916) */ eth_phy: ethernet-phy@0 { reg = <0>; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio_intc>; /* GPIOH_3 */ interrupts = <17 IRQ_TYPE_LEVEL_LOW>; diff --git a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts index 59b07a55e461..d54477b1001c 100644 --- a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts +++ b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts @@ -73,10 +73,6 @@ amlogic,tx-delay-ns = <4>; - snps,reset-gpio = <&gpio GPIOH_4 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>; @@ -85,6 +81,10 @@ eth_phy0: ethernet-phy@0 { /* Realtek RTL8211F (0x001cc916) */ reg = <0>; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>; }; }; }; -- 2.22.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/4] ARM: dts: meson: switch to the generic Ethernet PHY reset bindings 2019-06-12 20:55 ` [PATCH v2 2/4] ARM: dts: meson: switch to the generic Ethernet PHY reset bindings Martin Blumenstingl @ 2019-06-14 9:02 ` Neil Armstrong 0 siblings, 0 replies; 9+ messages in thread From: Neil Armstrong @ 2019-06-14 9:02 UTC (permalink / raw) To: Martin Blumenstingl, linux-amlogic, khilman Cc: andrew, netdev, linus.walleij, linux-kernel, robin.murphy, linux-arm-kernel On 12/06/2019 22:55, Martin Blumenstingl wrote: > The snps,reset-gpio bindings are deprecated in favour of the generic > "Ethernet PHY reset" bindings. > > Replace snps,reset-gpio from the ðmac node with reset-gpios in the > ethernet-phy node. The old snps,reset-active-low property is now encoded > directly as GPIO flag inside the reset-gpios property. > > snps,reset-delays-us is converted to reset-assert-us and > reset-deassert-us. reset-assert-us is the second cell from > snps,reset-delays-us while reset-deassert-us was the third cell. > Instead of blindly copying the old values (which seems strange since > they gave the PHY one second to come out of reset) over this also > updates the delays based on the datasheets: > - RTL8211F PHY on the Odroid-C1 and MXIII-Plus needs a 10ms assert > delay (the datasheet mentions: "For a complete PHY reset, this pin > must be asserted low for at least 10ms") and a 30ms deassert delay > (the datasheet mentions: "Wait for a further 30ms (for internal > circuits settling time) before accessing the PHY register"). The > old settings used 10ms for assert and 1000ms for deassert. > - IP101GR PHY on the EC-100 and MXQ needs a 10ms assert delay (the > datasheet mentions: "Trst | Reset period | 10ms") and a 10ms deassert > delay as well (the datasheet mentions: "Tclk_MII_rdy | MII/RMII clock > output ready after reset released | 10ms")). The old settings used > 10ms for assert and 1000ms for deassert. > > No functional changes intended. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > arch/arm/boot/dts/meson8b-ec100.dts | 9 +++++---- > arch/arm/boot/dts/meson8b-mxq.dts | 9 +++++---- > arch/arm/boot/dts/meson8b-odroidc1.dts | 9 +++++---- > arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 8 ++++---- > 4 files changed, 19 insertions(+), 16 deletions(-) > > diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts > index 9bf4249cb60d..96d239d8334e 100644 > --- a/arch/arm/boot/dts/meson8b-ec100.dts > +++ b/arch/arm/boot/dts/meson8b-ec100.dts > @@ -234,10 +234,6 @@ > phy-handle = <ð_phy0>; > phy-mode = "rmii"; > > - snps,reset-gpio = <&gpio GPIOH_4 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > mdio { > compatible = "snps,dwmac-mdio"; > #address-cells = <1>; > @@ -246,6 +242,11 @@ > eth_phy0: ethernet-phy@0 { > /* IC Plus IP101A/G (0x02430c54) */ > reg = <0>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <10000>; > + reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>; > + > icplus,select-interrupt; > interrupt-parent = <&gpio_intc>; > /* GPIOH_3 */ > diff --git a/arch/arm/boot/dts/meson8b-mxq.dts b/arch/arm/boot/dts/meson8b-mxq.dts > index ef602ab45efd..bb27b34eb346 100644 > --- a/arch/arm/boot/dts/meson8b-mxq.dts > +++ b/arch/arm/boot/dts/meson8b-mxq.dts > @@ -91,10 +91,6 @@ > phy-handle = <ð_phy0>; > phy-mode = "rmii"; > > - snps,reset-gpio = <&gpio GPIOH_4 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > mdio { > compatible = "snps,dwmac-mdio"; > #address-cells = <1>; > @@ -103,6 +99,11 @@ > eth_phy0: ethernet-phy@0 { > /* IC Plus IP101A/G (0x02430c54) */ > reg = <0>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <10000>; > + reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>; > + > icplus,select-interrupt; > interrupt-parent = <&gpio_intc>; > /* GPIOH_3 */ > diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts > index 018695b2b83a..86c4614e0a38 100644 > --- a/arch/arm/boot/dts/meson8b-odroidc1.dts > +++ b/arch/arm/boot/dts/meson8b-odroidc1.dts > @@ -176,10 +176,6 @@ > ðmac { > status = "okay"; > > - snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>; > - snps,reset-active-low; > - snps,reset-delays-us = <0 10000 30000>; > - > pinctrl-0 = <ð_rgmii_pins>; > pinctrl-names = "default"; > > @@ -195,6 +191,11 @@ > /* Realtek RTL8211F (0x001cc916) */ > eth_phy: ethernet-phy@0 { > reg = <0>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>; > + > interrupt-parent = <&gpio_intc>; > /* GPIOH_3 */ > interrupts = <17 IRQ_TYPE_LEVEL_LOW>; > diff --git a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts > index 59b07a55e461..d54477b1001c 100644 > --- a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts > +++ b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts > @@ -73,10 +73,6 @@ > > amlogic,tx-delay-ns = <4>; > > - snps,reset-gpio = <&gpio GPIOH_4 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > mdio { > compatible = "snps,dwmac-mdio"; > #address-cells = <1>; > @@ -85,6 +81,10 @@ > eth_phy0: ethernet-phy@0 { > /* Realtek RTL8211F (0x001cc916) */ > reg = <0>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>; > }; > }; > }; > Nice ! Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 3/4] arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings 2019-06-12 20:55 [PATCH v2 0/4] Ethernet PHY reset GPIO updates for Amlogic SoCs Martin Blumenstingl 2019-06-12 20:55 ` [PATCH v2 1/4] arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line Martin Blumenstingl 2019-06-12 20:55 ` [PATCH v2 2/4] ARM: dts: meson: switch to the generic Ethernet PHY reset bindings Martin Blumenstingl @ 2019-06-12 20:55 ` Martin Blumenstingl 2019-06-14 9:03 ` Neil Armstrong 2019-06-12 20:55 ` [PATCH v2 4/4] arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line Martin Blumenstingl 3 siblings, 1 reply; 9+ messages in thread From: Martin Blumenstingl @ 2019-06-12 20:55 UTC (permalink / raw) To: linux-amlogic, khilman Cc: andrew, Martin Blumenstingl, netdev, linus.walleij, linux-kernel, robin.murphy, linux-arm-kernel The snps,reset-gpio bindings are deprecated in favour of the generic "Ethernet PHY reset" bindings. Replace snps,reset-gpio from the ðmac node with reset-gpios in the ethernet-phy node. The old snps,reset-active-low property is now encoded directly as GPIO flag inside the reset-gpios property. snps,reset-delays-us is converted to reset-assert-us and reset-deassert-us. reset-assert-us is the second cell from snps,reset-delays-us while reset-deassert-us was the third cell. Instead of blindly copying the old values (which seems strange since they gave the PHY one second to come out of reset) over this also updates the delays based on the datasheets: - the Realtek RTL8211F PHY needs a 10ms assert delay (the datasheet mentions: "For a complete PHY reset, this pin must be asserted low for at least 10ms") and a 30ms deassert delay (the datasheet mentions: "Wait for a further 30ms (for internal circuits settling time) before accessing the PHY register". This applies to the following boards: GXBB NanoPi K2, GXBB Odroid-C2, GXBB Vega S95 variants, GXBB Wetek variants, GXL P230, GXM Khadas VIM2, GXM Nexbox A1, GXM Q200, GXM RBox Pro boards. - the ICPlus IP101GR PHY needs a 10ms assert delay (the datasheet mentions: "Trst | Reset period | 10ms") and a deassert delay of 10ms as well (the datasheet mentions: "Tclk_MII_rdy | MII/RMII clock output ready after reset released | 10ms"). This applies to the GXBB Nexbox A95X board. - the Micrel KSZ9031 seems to require a 100us delay but use the same (seemingly safe) values from RTL8211F due to lack of a board to verify this. This applies to the GXBB P200 board. The GXBB P201 board is left out from this conversion because it doesn't have a dedicated PHY node (because it's not clear which PHY is used on that board). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 9 +++++---- .../arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts | 8 ++++---- arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 9 +++++---- arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts | 9 +++++---- arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 9 +++++---- arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi | 8 ++++---- arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts | 11 ++++++----- arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 10 +++++----- arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 8 ++++---- arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts | 11 ++++++----- arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts | 8 ++++---- 11 files changed, 53 insertions(+), 47 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts index 849c01650c4d..c34c1c90ccb6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts @@ -154,10 +154,6 @@ amlogic,tx-delay-ns = <2>; - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>; @@ -166,6 +162,11 @@ eth_phy0: ethernet-phy@0 { /* Realtek RTL8211F (0x001cc916) */ reg = <0>; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio_intc>; /* MAC_INTR on GPIOZ_15 */ interrupts = <29 IRQ_TYPE_LEVEL_LOW>; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts index 3c54f26eef15..b636912a2715 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts @@ -162,10 +162,6 @@ phy-handle = <ð_phy0>; phy-mode = "rmii"; - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>; @@ -174,6 +170,10 @@ eth_phy0: ethernet-phy@0 { /* IC Plus IP101GR (0x02430c54) */ reg = <0>; + + reset-assert-us = <10000>; + reset-deassert-us = <10000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; }; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts index 5a139e7b1c60..9972b1515da6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts @@ -126,10 +126,6 @@ phy-handle = <ð_phy0>; phy-mode = "rgmii"; - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - amlogic,tx-delay-ns = <2>; mdio { @@ -140,6 +136,11 @@ eth_phy0: ethernet-phy@0 { /* Realtek RTL8211F (0x001cc916) */ reg = <0>; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio_intc>; /* MAC_INTR on GPIOZ_15 */ interrupts = <29 IRQ_TYPE_LEVEL_LOW>; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts index 9d2406a7c4fa..3c93d1898b40 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts @@ -68,10 +68,6 @@ amlogic,tx-delay-ns = <2>; - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>; @@ -80,6 +76,11 @@ eth_phy0: ethernet-phy@3 { /* Micrel KSZ9031 (0x00221620) */ reg = <3>; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio_intc>; /* MAC_INTR on GPIOZ_15 */ interrupts = <29 IRQ_TYPE_LEVEL_LOW>; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi index 18856f28fd60..43b11e3dfe11 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi @@ -116,10 +116,6 @@ amlogic,tx-delay-ns = <2>; - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>; @@ -128,6 +124,11 @@ eth_phy0: ethernet-phy@0 { /* Realtek RTL8211F (0x001cc916) */ reg = <0>; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio_intc>; /* MAC_INTR on GPIOZ_15 */ interrupts = <29 IRQ_TYPE_LEVEL_LOW>; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi index 9ef6858779c1..4c539881fbb7 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi @@ -137,10 +137,6 @@ amlogic,tx-delay-ns = <2>; - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>; @@ -149,6 +145,10 @@ eth_phy0: ethernet-phy@0 { /* Realtek RTL8211F (0x001cc916) */ reg = <0>; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; }; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts index 767b1763a612..b08c4537f260 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts @@ -70,11 +70,6 @@ amlogic,tx-delay-ns = <2>; - /* External PHY reset is shared with internal PHY Led signals */ - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - /* External PHY is in RGMII */ phy-mode = "rgmii"; }; @@ -84,6 +79,12 @@ /* Realtek RTL8211F (0x001cc916) */ reg = <0>; max-speed = <1000>; + + /* External PHY reset is shared with internal PHY Led signal */ + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio_intc>; interrupts = <29 IRQ_TYPE_LEVEL_LOW>; eee-broken-1000t; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts index ff4f0780824d..989d33ac6eae 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts @@ -239,11 +239,6 @@ amlogic,tx-delay-ns = <2>; - /* External PHY reset is shared with internal PHY Led signals */ - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - /* External PHY is in RGMII */ phy-mode = "rgmii"; @@ -254,6 +249,11 @@ external_phy: ethernet-phy@0 { /* Realtek RTL8211F (0x001cc916) */ reg = <0>; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio_intc>; /* MAC_INTR on GPIOZ_15 */ interrupts = <25 IRQ_TYPE_LEVEL_LOW>; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts index 29715eae14a9..c2bd4dbbf38c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts @@ -101,10 +101,6 @@ amlogic,tx-delay-ns = <2>; - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - /* External PHY is in RGMII */ phy-mode = "rgmii"; }; @@ -114,6 +110,10 @@ /* Realtek RTL8211F (0x001cc916) */ reg = <0>; max-speed = <1000>; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts index 8939c0fc5b62..ea45ae0c71b7 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts @@ -52,11 +52,6 @@ amlogic,tx-delay-ns = <2>; - /* External PHY reset is shared with internal PHY Led signals */ - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - /* External PHY is in RGMII */ phy-mode = "rgmii"; }; @@ -66,6 +61,12 @@ /* Realtek RTL8211F (0x001cc916) */ reg = <0>; max-speed = <1000>; + + /* External PHY reset is shared with internal PHY Led signal */ + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio_intc>; /* MAC_INTR on GPIOZ_15 */ interrupts = <25 IRQ_TYPE_LEVEL_LOW>; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts index 13de1e8f58b5..5cd4d35006d0 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts @@ -101,10 +101,6 @@ /* Select external PHY by default */ phy-handle = <&external_phy>; - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - amlogic,tx-delay-ns = <2>; /* External PHY is in RGMII */ @@ -116,6 +112,10 @@ /* Realtek RTL8211F (0x001cc916) */ reg = <0>; max-speed = <1000>; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; }; }; -- 2.22.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings 2019-06-12 20:55 ` [PATCH v2 3/4] arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings Martin Blumenstingl @ 2019-06-14 9:03 ` Neil Armstrong 0 siblings, 0 replies; 9+ messages in thread From: Neil Armstrong @ 2019-06-14 9:03 UTC (permalink / raw) To: Martin Blumenstingl, linux-amlogic, khilman Cc: andrew, netdev, linus.walleij, linux-kernel, robin.murphy, linux-arm-kernel On 12/06/2019 22:55, Martin Blumenstingl wrote: > The snps,reset-gpio bindings are deprecated in favour of the generic > "Ethernet PHY reset" bindings. > > Replace snps,reset-gpio from the ðmac node with reset-gpios in the > ethernet-phy node. The old snps,reset-active-low property is now encoded > directly as GPIO flag inside the reset-gpios property. > > snps,reset-delays-us is converted to reset-assert-us and > reset-deassert-us. reset-assert-us is the second cell from > snps,reset-delays-us while reset-deassert-us was the third cell. > > Instead of blindly copying the old values (which seems strange since > they gave the PHY one second to come out of reset) over this also > updates the delays based on the datasheets: > - the Realtek RTL8211F PHY needs a 10ms assert delay (the datasheet > mentions: "For a complete PHY reset, this pin must be asserted low > for at least 10ms") and a 30ms deassert delay (the datasheet > mentions: "Wait for a further 30ms (for internal circuits settling > time) before accessing the PHY register". This applies to the > following boards: GXBB NanoPi K2, GXBB Odroid-C2, GXBB Vega S95 > variants, GXBB Wetek variants, GXL P230, GXM Khadas VIM2, GXM Nexbox > A1, GXM Q200, GXM RBox Pro boards. > - the ICPlus IP101GR PHY needs a 10ms assert delay (the datasheet > mentions: "Trst | Reset period | 10ms") and a deassert delay of 10ms > as well (the datasheet mentions: "Tclk_MII_rdy | MII/RMII clock > output ready after reset released | 10ms"). This applies to the GXBB > Nexbox A95X board. > - the Micrel KSZ9031 seems to require a 100us delay but use the same > (seemingly safe) values from RTL8211F due to lack of a board to verify > this. This applies to the GXBB P200 board. > > The GXBB P201 board is left out from this conversion because it doesn't > have a dedicated PHY node (because it's not clear which PHY is used on > that board). > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 9 +++++---- > .../arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts | 8 ++++---- > arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 9 +++++---- > arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts | 9 +++++---- > arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 9 +++++---- > arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi | 8 ++++---- > arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts | 11 ++++++----- > arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 10 +++++----- > arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 8 ++++---- > arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts | 11 ++++++----- > arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts | 8 ++++---- > 11 files changed, 53 insertions(+), 47 deletions(-) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts > index 849c01650c4d..c34c1c90ccb6 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts > @@ -154,10 +154,6 @@ > > amlogic,tx-delay-ns = <2>; > > - snps,reset-gpio = <&gpio GPIOZ_14 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > mdio { > compatible = "snps,dwmac-mdio"; > #address-cells = <1>; > @@ -166,6 +162,11 @@ > eth_phy0: ethernet-phy@0 { > /* Realtek RTL8211F (0x001cc916) */ > reg = <0>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; > + > interrupt-parent = <&gpio_intc>; > /* MAC_INTR on GPIOZ_15 */ > interrupts = <29 IRQ_TYPE_LEVEL_LOW>; > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts > index 3c54f26eef15..b636912a2715 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts > @@ -162,10 +162,6 @@ > phy-handle = <ð_phy0>; > phy-mode = "rmii"; > > - snps,reset-gpio = <&gpio GPIOZ_14 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > mdio { > compatible = "snps,dwmac-mdio"; > #address-cells = <1>; > @@ -174,6 +170,10 @@ > eth_phy0: ethernet-phy@0 { > /* IC Plus IP101GR (0x02430c54) */ > reg = <0>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <10000>; > + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; > }; > }; > }; > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts > index 5a139e7b1c60..9972b1515da6 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts > @@ -126,10 +126,6 @@ > phy-handle = <ð_phy0>; > phy-mode = "rgmii"; > > - snps,reset-gpio = <&gpio GPIOZ_14 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > amlogic,tx-delay-ns = <2>; > > mdio { > @@ -140,6 +136,11 @@ > eth_phy0: ethernet-phy@0 { > /* Realtek RTL8211F (0x001cc916) */ > reg = <0>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; > + > interrupt-parent = <&gpio_intc>; > /* MAC_INTR on GPIOZ_15 */ > interrupts = <29 IRQ_TYPE_LEVEL_LOW>; > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts > index 9d2406a7c4fa..3c93d1898b40 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts > @@ -68,10 +68,6 @@ > > amlogic,tx-delay-ns = <2>; > > - snps,reset-gpio = <&gpio GPIOZ_14 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > mdio { > compatible = "snps,dwmac-mdio"; > #address-cells = <1>; > @@ -80,6 +76,11 @@ > eth_phy0: ethernet-phy@3 { > /* Micrel KSZ9031 (0x00221620) */ > reg = <3>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; > + > interrupt-parent = <&gpio_intc>; > /* MAC_INTR on GPIOZ_15 */ > interrupts = <29 IRQ_TYPE_LEVEL_LOW>; > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi > index 18856f28fd60..43b11e3dfe11 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi > @@ -116,10 +116,6 @@ > > amlogic,tx-delay-ns = <2>; > > - snps,reset-gpio = <&gpio GPIOZ_14 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > mdio { > compatible = "snps,dwmac-mdio"; > #address-cells = <1>; > @@ -128,6 +124,11 @@ > eth_phy0: ethernet-phy@0 { > /* Realtek RTL8211F (0x001cc916) */ > reg = <0>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; > + > interrupt-parent = <&gpio_intc>; > /* MAC_INTR on GPIOZ_15 */ > interrupts = <29 IRQ_TYPE_LEVEL_LOW>; > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi > index 9ef6858779c1..4c539881fbb7 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi > @@ -137,10 +137,6 @@ > > amlogic,tx-delay-ns = <2>; > > - snps,reset-gpio = <&gpio GPIOZ_14 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > mdio { > compatible = "snps,dwmac-mdio"; > #address-cells = <1>; > @@ -149,6 +145,10 @@ > eth_phy0: ethernet-phy@0 { > /* Realtek RTL8211F (0x001cc916) */ > reg = <0>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; > }; > }; > }; > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts > index 767b1763a612..b08c4537f260 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts > @@ -70,11 +70,6 @@ > > amlogic,tx-delay-ns = <2>; > > - /* External PHY reset is shared with internal PHY Led signals */ > - snps,reset-gpio = <&gpio GPIOZ_14 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > /* External PHY is in RGMII */ > phy-mode = "rgmii"; > }; > @@ -84,6 +79,12 @@ > /* Realtek RTL8211F (0x001cc916) */ > reg = <0>; > max-speed = <1000>; > + > + /* External PHY reset is shared with internal PHY Led signal */ > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; > + > interrupt-parent = <&gpio_intc>; > interrupts = <29 IRQ_TYPE_LEVEL_LOW>; > eee-broken-1000t; > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts > index ff4f0780824d..989d33ac6eae 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts > @@ -239,11 +239,6 @@ > > amlogic,tx-delay-ns = <2>; > > - /* External PHY reset is shared with internal PHY Led signals */ > - snps,reset-gpio = <&gpio GPIOZ_14 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > /* External PHY is in RGMII */ > phy-mode = "rgmii"; > > @@ -254,6 +249,11 @@ > external_phy: ethernet-phy@0 { > /* Realtek RTL8211F (0x001cc916) */ > reg = <0>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; > + > interrupt-parent = <&gpio_intc>; > /* MAC_INTR on GPIOZ_15 */ > interrupts = <25 IRQ_TYPE_LEVEL_LOW>; > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts > index 29715eae14a9..c2bd4dbbf38c 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts > @@ -101,10 +101,6 @@ > > amlogic,tx-delay-ns = <2>; > > - snps,reset-gpio = <&gpio GPIOZ_14 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > /* External PHY is in RGMII */ > phy-mode = "rgmii"; > }; > @@ -114,6 +110,10 @@ > /* Realtek RTL8211F (0x001cc916) */ > reg = <0>; > max-speed = <1000>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; > }; > }; > > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts > index 8939c0fc5b62..ea45ae0c71b7 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts > @@ -52,11 +52,6 @@ > > amlogic,tx-delay-ns = <2>; > > - /* External PHY reset is shared with internal PHY Led signals */ > - snps,reset-gpio = <&gpio GPIOZ_14 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > /* External PHY is in RGMII */ > phy-mode = "rgmii"; > }; > @@ -66,6 +61,12 @@ > /* Realtek RTL8211F (0x001cc916) */ > reg = <0>; > max-speed = <1000>; > + > + /* External PHY reset is shared with internal PHY Led signal */ > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; > + > interrupt-parent = <&gpio_intc>; > /* MAC_INTR on GPIOZ_15 */ > interrupts = <25 IRQ_TYPE_LEVEL_LOW>; > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts > index 13de1e8f58b5..5cd4d35006d0 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts > @@ -101,10 +101,6 @@ > /* Select external PHY by default */ > phy-handle = <&external_phy>; > > - snps,reset-gpio = <&gpio GPIOZ_14 0>; > - snps,reset-delays-us = <0 10000 1000000>; > - snps,reset-active-low; > - > amlogic,tx-delay-ns = <2>; > > /* External PHY is in RGMII */ > @@ -116,6 +112,10 @@ > /* Realtek RTL8211F (0x001cc916) */ > reg = <0>; > max-speed = <1000>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; > }; > }; > > Finally... ! This will break u-boot, but it's u-boot's fault not handling the mdio bus ! Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 4/4] arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line 2019-06-12 20:55 [PATCH v2 0/4] Ethernet PHY reset GPIO updates for Amlogic SoCs Martin Blumenstingl ` (2 preceding siblings ...) 2019-06-12 20:55 ` [PATCH v2 3/4] arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings Martin Blumenstingl @ 2019-06-12 20:55 ` Martin Blumenstingl 2019-06-14 9:08 ` Neil Armstrong 3 siblings, 1 reply; 9+ messages in thread From: Martin Blumenstingl @ 2019-06-12 20:55 UTC (permalink / raw) To: linux-amlogic, khilman Cc: andrew, Martin Blumenstingl, netdev, linus.walleij, linux-kernel, robin.murphy, linux-arm-kernel The reset line of the RTL8211F PHY is routed to the GPIOZ_15 pad. Describe this in the device tree so the PHY framework can bring the PHY into a known state when initializing it. GPIOZ_15 doesn't support driving the output HIGH (to take the PHY out of reset, only output LOW to reset the PHY is supported). The datasheet states it's an "3.3V input tolerant open drain (OD) output pin". Instead there's a pull-up resistor on the board to take the PHY out of reset. The GPIO itself will be set to INPUT mode to take the PHY out of reset and LOW to reset the PHY, which is achieved with the flags (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts index 4146cd84989c..f911bbdc4e70 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts @@ -186,6 +186,10 @@ /* Realtek RTL8211F (0x001cc916) */ reg = <0>; max-speed = <1000>; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; }; }; -- 2.22.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v2 4/4] arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line 2019-06-12 20:55 ` [PATCH v2 4/4] arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line Martin Blumenstingl @ 2019-06-14 9:08 ` Neil Armstrong 0 siblings, 0 replies; 9+ messages in thread From: Neil Armstrong @ 2019-06-14 9:08 UTC (permalink / raw) To: Martin Blumenstingl, linux-amlogic, khilman Cc: andrew, netdev, linus.walleij, linux-kernel, robin.murphy, linux-arm-kernel On 12/06/2019 22:55, Martin Blumenstingl wrote: > The reset line of the RTL8211F PHY is routed to the GPIOZ_15 pad. > Describe this in the device tree so the PHY framework can bring the PHY > into a known state when initializing it. GPIOZ_15 doesn't support > driving the output HIGH (to take the PHY out of reset, only output LOW > to reset the PHY is supported). The datasheet states it's an "3.3V input > tolerant open drain (OD) output pin". Instead there's a pull-up resistor > on the board to take the PHY out of reset. The GPIO itself will be set > to INPUT mode to take the PHY out of reset and LOW to reset the PHY, > which is achieved with the flags (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN). > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts > index 4146cd84989c..f911bbdc4e70 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts > @@ -186,6 +186,10 @@ > /* Realtek RTL8211F (0x001cc916) */ > reg = <0>; > max-speed = <1000>; > + > + reset-assert-us = <10000>; > + reset-deassert-us = <30000>; > + reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; > }; > }; > > Thanks ! Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-06-14 9:08 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-06-12 20:55 [PATCH v2 0/4] Ethernet PHY reset GPIO updates for Amlogic SoCs Martin Blumenstingl 2019-06-12 20:55 ` [PATCH v2 1/4] arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line Martin Blumenstingl 2019-06-14 9:02 ` Neil Armstrong 2019-06-12 20:55 ` [PATCH v2 2/4] ARM: dts: meson: switch to the generic Ethernet PHY reset bindings Martin Blumenstingl 2019-06-14 9:02 ` Neil Armstrong 2019-06-12 20:55 ` [PATCH v2 3/4] arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings Martin Blumenstingl 2019-06-14 9:03 ` Neil Armstrong 2019-06-12 20:55 ` [PATCH v2 4/4] arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line Martin Blumenstingl 2019-06-14 9:08 ` Neil Armstrong
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