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[82.243.161.21]) by smtp.gmail.com with ESMTPSA id o8sm17856891wra.4.2019.05.11.10.25.59 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Sat, 11 May 2019 10:26:00 -0700 (PDT) Message-ID: Subject: Re: [PATCH 5/5] arm64: dts: meson: sei510: add network support From: Jerome Brunet To: Martin Blumenstingl , Kevin Hilman Date: Sat, 11 May 2019 19:25:58 +0200 In-Reply-To: References: <20190510164940.13496-1-jbrunet@baylibre.com> <20190510164940.13496-6-jbrunet@baylibre.com> <7ho94ac4jn.fsf@baylibre.com> User-Agent: Evolution 3.30.5 (3.30.5-1.fc29) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190511_102602_890862_6F057BB7 X-CRM114-Status: GOOD ( 15.45 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Sat, 2019-05-11 at 19:16 +0200, Martin Blumenstingl wrote: > Hi Kevin, > > On Sat, May 11, 2019 at 12:45 AM Kevin Hilman wrote: > > Jerome Brunet writes: > > > > > Enable the network interface of the SEI510 which use the internal PHY. > > > > > > Signed-off-by: Jerome Brunet > > > > I tried testing this series on SEI510, but I must still be missing some > > defconfig options, as the default defconfig doesn't lead to a working > > interface. > > > > > > I tried adding this kconfig fragment[1], and the dwmac probes/inits but > > I must still be missing something, as the dwmac is still failing to find > > a PHY. Boot log: https://termbin.com/ivf3 > > > > I have the same result testing on the u200. > I wonder if we're simply missing the pinctrl definitions in the ethmac node: > pinctrl-0 = <ð_rmii_pins>; > pinctrl-names = "default"; > > I don't know how the SoC works internally but I am assuming that the > MDIO pins are routed to the "internal PHY" (within the chip). > also we need the eth_rmii_pins anyways for the RXD/TXD pins which are > connected to the physical Ethernet port on the board. > bonus question: while writing this email I'm surprised to see that on > GXL we don't use the rmii pins anywhere, why is Ethernet working fine > there? AFAIK, the pinmux is for the external pad Martin The internal phy does not use those pads. > > > Martin _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic