linux-api.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Maxime Coquelin <mcoquelin.stm32@gmail.com>
To: u.kleine-koenig@pengutronix.de, afaerber@suse.de,
	geert@linux-m68k.org, Rob Herring <robh+dt@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	Arnd Bergmann <arnd@arndb.de>,
	stefan@agner.ch, pmeerw@pmeerw.net, pebolle@tiscali.nl,
	peter@hurleysoftware.com, andy.shevchenko@gmail.com,
	cw00.choi@samsung.com, Russell King <linux@arm.linux.org.uk>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	joe@perches.com
Cc: Mark Rutland <mark.rutland@arm.com>,
	linux-doc@vger.kernel.org, Will Deacon <will.deacon@arm.com>,
	Nikolay Borisov <Nikolay.Borisov@arm.com>,
	linux-api@vger.kernel.org, Jiri Slaby <jslaby@suse.cz>,
	linux-arch@vger.kernel.org, Jonathan Corbet <corbet@lwn.net>,
	Mauro Carvalho Chehab <mchehab@osg.samsung.com>,
	Antti Palosaari <crope@iki.fi>,
	linux-serial@vger.kernel.org, devicetree@vger.kernel.org,
	Kees Cook <keescook@chromium.org>,
	Pawel Moll <pawel.moll@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Rusty Russell <rusty@rustcorp.com.au>,
	linux-gpio@vger.kernel.org, Thomas Gleixner <tglx@linutronix.de>,
	linux-arm-kernel@lists.infradead.org,
	Michal Marek <mmarek@suse.cz>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-kernel@vger.kernel.org, mcoquelin.stm32@gmail.com,
	Kumar Gala <galak@codeaurora.org>, Tejun Heo <tj@kernel.org>,
	Andrew Morton <akpm@linux-fo>
Subject: [PATCH v6 06/15] drivers: reset: Add STM32 reset driver
Date: Tue,  7 Apr 2015 18:30:25 +0200	[thread overview]
Message-ID: <1428424234-28572-7-git-send-email-mcoquelin.stm32@gmail.com> (raw)
In-Reply-To: <1428424234-28572-1-git-send-email-mcoquelin.stm32@gmail.com>

The STM32 MCUs family IPs can be reset by accessing some registers
from the RCC block.

The list of available reset lines is documented in the DT bindings.

Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
---
 drivers/reset/Makefile      |   1 +
 drivers/reset/reset-stm32.c | 124 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 125 insertions(+)
 create mode 100644 drivers/reset/reset-stm32.c

diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 157d421..aed12d1 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -1,5 +1,6 @@
 obj-$(CONFIG_RESET_CONTROLLER) += core.o
 obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
 obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o
+obj-$(CONFIG_ARCH_STM32) += reset-stm32.o
 obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
 obj-$(CONFIG_ARCH_STI) += sti/
diff --git a/drivers/reset/reset-stm32.c b/drivers/reset/reset-stm32.c
new file mode 100644
index 0000000..2c41858
--- /dev/null
+++ b/drivers/reset/reset-stm32.c
@@ -0,0 +1,124 @@
+/*
+ * Copyright (C) Maxime Coquelin 2015
+ * Author:  Maxime Coquelin <mcoquelin.stm32@gmail.com>
+ * License terms:  GNU General Public License (GPL), version 2
+ *
+ * Heavily based on sunxi driver from Maxime Ripard.
+ */
+
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+
+struct stm32_reset_data {
+	spinlock_t			lock;
+	void __iomem			*membase;
+	struct reset_controller_dev	rcdev;
+};
+
+static int stm32_reset_assert(struct reset_controller_dev *rcdev,
+			      unsigned long id)
+{
+	struct stm32_reset_data *data = container_of(rcdev,
+						     struct stm32_reset_data,
+						     rcdev);
+	int bank = id / BITS_PER_LONG;
+	int offset = id % BITS_PER_LONG;
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&data->lock, flags);
+
+	reg = readl_relaxed(data->membase + (bank * 4));
+	writel_relaxed(reg | BIT(offset), data->membase + (bank * 4));
+
+	spin_unlock_irqrestore(&data->lock, flags);
+
+	return 0;
+}
+
+static int stm32_reset_deassert(struct reset_controller_dev *rcdev,
+				unsigned long id)
+{
+	struct stm32_reset_data *data = container_of(rcdev,
+						     struct stm32_reset_data,
+						     rcdev);
+	int bank = id / BITS_PER_LONG;
+	int offset = id % BITS_PER_LONG;
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&data->lock, flags);
+
+	reg = readl_relaxed(data->membase + (bank * 4));
+	writel_relaxed(reg & ~BIT(offset), data->membase + (bank * 4));
+
+	spin_unlock_irqrestore(&data->lock, flags);
+
+	return 0;
+}
+
+static struct reset_control_ops stm32_reset_ops = {
+	.assert		= stm32_reset_assert,
+	.deassert	= stm32_reset_deassert,
+};
+
+static const struct of_device_id stm32_reset_dt_ids[] = {
+	 { .compatible = "st,stm32-rcc", },
+	 { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, sstm32_reset_dt_ids);
+
+static int stm32_reset_probe(struct platform_device *pdev)
+{
+	struct stm32_reset_data *data;
+	struct resource *res;
+
+	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	data->membase = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(data->membase))
+		return PTR_ERR(data->membase);
+
+	spin_lock_init(&data->lock);
+
+	data->rcdev.owner = THIS_MODULE;
+	data->rcdev.nr_resets = resource_size(res) * 8;
+	data->rcdev.ops = &stm32_reset_ops;
+	data->rcdev.of_node = pdev->dev.of_node;
+
+	return reset_controller_register(&data->rcdev);
+}
+
+static int stm32_reset_remove(struct platform_device *pdev)
+{
+	struct stm32_reset_data *data = platform_get_drvdata(pdev);
+
+	reset_controller_unregister(&data->rcdev);
+
+	return 0;
+}
+
+static struct platform_driver stm32_reset_driver = {
+	.probe	= stm32_reset_probe,
+	.remove	= stm32_reset_remove,
+	.driver = {
+		.name		= "stm32-rcc-reset",
+		.of_match_table	= stm32_reset_dt_ids,
+	},
+};
+module_platform_driver(stm32_reset_driver);
+
+MODULE_AUTHOR("Maxime Coquelin <maxime.coquelin@gmail.com>");
+MODULE_DESCRIPTION("STM32 MCUs Reset Controller Driver");
+MODULE_LICENSE("GPL");
-- 
1.9.1

  parent reply	other threads:[~2015-04-07 16:30 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-07 16:30 [PATCH v6 00/15] Add support to STMicroelectronics STM32 family Maxime Coquelin
2015-04-07 16:30 ` [PATCH v6 01/15] scripts: link-vmlinux: Don't pass page offset to kallsyms if XIP Kernel Maxime Coquelin
2015-04-07 16:30 ` [PATCH v6 02/15] ARM: ARMv7-M: Enlarge vector table up to 256 entries Maxime Coquelin
     [not found] ` <1428424234-28572-1-git-send-email-mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-04-07 16:30   ` [PATCH v6 03/15] dt-bindings: Document the ARM System timer bindings Maxime Coquelin
2015-04-07 16:30   ` [PATCH v6 07/15] dt-bindings: Document the STM32 " Maxime Coquelin
2015-04-07 16:30   ` [PATCH v6 09/15] dt-bindings: Document the STM32 USART bindings Maxime Coquelin
2015-04-07 19:26     ` Rob Herring
2015-04-07 16:30   ` [PATCH v6 10/15] serial: stm32-usart: Add STM32 USART Driver Maxime Coquelin
     [not found]     ` <1428424234-28572-11-git-send-email-mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-04-07 16:36       ` Andy Shevchenko
2015-04-07 16:51     ` Andreas Färber
2015-04-07 17:05       ` Peter Hurley
2015-04-09 13:04     ` Vladimir Zapolskiy
     [not found]       ` <552678E7.4040107-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
2015-04-28 12:13         ` Maxime Coquelin
2015-04-08  9:14   ` [PATCH v6 00/15] Add support to STMicroelectronics STM32 family Maxime Coquelin
2015-04-07 16:30 ` [PATCH v6 04/15] clocksource/drivers: Add ARM System timer driver Maxime Coquelin
     [not found]   ` <1428424234-28572-5-git-send-email-mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-04-09 10:52     ` Daniel Lezcano
2015-04-07 16:30 ` [PATCH v6 05/15] dt-bindings: Document the STM32 reset bindings Maxime Coquelin
2015-04-07 16:30 ` Maxime Coquelin [this message]
2015-04-07 16:30 ` [PATCH v6 08/15] clockevents/drivers: Add STM32 Timer driver Maxime Coquelin
2015-04-07 16:30 ` [PATCH v6 11/15] ARM: Add STM32 family machine Maxime Coquelin
2015-04-07 16:30 ` [PATCH v6 12/15] ARM: dts: Add ARM System timer as clockevent in armv7m Maxime Coquelin
2015-04-07 16:30 ` [PATCH v6 13/15] ARM: dts: Introduce STM32F429 MCU Maxime Coquelin
2015-04-07 16:30 ` [PATCH v6 14/15] ARM: configs: Add STM32 defconfig Maxime Coquelin
2015-04-07 16:30 ` [PATCH v6 15/15] MAINTAINERS: Add entry for STM32 MCUs Maxime Coquelin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1428424234-28572-7-git-send-email-mcoquelin.stm32@gmail.com \
    --to=mcoquelin.stm32@gmail.com \
    --cc=Nikolay.Borisov@arm.com \
    --cc=afaerber@suse.de \
    --cc=akpm@linux-fo \
    --cc=andy.shevchenko@gmail.com \
    --cc=arnd@arndb.de \
    --cc=corbet@lwn.net \
    --cc=crope@iki.fi \
    --cc=cw00.choi@samsung.com \
    --cc=daniel.lezcano@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=galak@codeaurora.org \
    --cc=geert@linux-m68k.org \
    --cc=gregkh@linuxfoundation.org \
    --cc=ijc+devicetree@hellion.org.uk \
    --cc=joe@perches.com \
    --cc=jslaby@suse.cz \
    --cc=keescook@chromium.org \
    --cc=linus.walleij@linaro.org \
    --cc=linux-api@vger.kernel.org \
    --cc=linux-arch@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-serial@vger.kernel.org \
    --cc=linux@arm.linux.org.uk \
    --cc=mark.rutland@arm.com \
    --cc=mchehab@osg.samsung.com \
    --cc=mmarek@suse.cz \
    --cc=p.zabel@pengutronix.de \
    --cc=pawel.moll@arm.com \
    --cc=pebolle@tiscali.nl \
    --cc=peter@hurleysoftware.com \
    --cc=pmeerw@pmeerw.net \
    --cc=robh+dt@kernel.org \
    --cc=rusty@rustcorp.com.au \
    --cc=stefan@agner.ch \
    --cc=tglx@linutronix.de \
    --cc=tj@kernel.org \
    --cc=u.kleine-koenig@pengutronix.de \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).