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From: "Kirill A. Shutemov" <kirill@shutemov.name>
To: Borislav Petkov <bp@alien8.de>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Arnd Bergmann <arnd@arndb.de>,
	"H. Peter Anvin" <hpa@zytor.com>, Andi Kleen <ak@linux.intel.com>,
	Dave Hansen <dave.hansen@intel.com>,
	Andy Lutomirski <luto@amacapital.net>,
	linux-arch@vger.kernel.org, linux-mm@kvack.org,
	linux-kernel@vger.kernel.org
Subject: Re: [RFC, PATCHv1 15/28] x86: detect 5-level paging support
Date: Fri, 9 Dec 2016 18:32:33 +0300	[thread overview]
Message-ID: <20161209153233.GA8932@node.shutemov.name> (raw)
In-Reply-To: <20161208200505.c6xiy56oufg6d24m@pd.tnic>

On Thu, Dec 08, 2016 at 09:05:05PM +0100, Borislav Petkov wrote:
> On Thu, Dec 08, 2016 at 07:21:37PM +0300, Kirill A. Shutemov wrote:
> > 5-level paging support is required from hardware when compiled with
> > CONFIG_X86_5LEVEL=y. We may implement runtime switch support later.
> > 
> > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> 
> ...
> 
> > diff --git a/arch/x86/boot/cpuflags.c b/arch/x86/boot/cpuflags.c
> > index 6687ab953257..26e9a287805f 100644
> > --- a/arch/x86/boot/cpuflags.c
> > +++ b/arch/x86/boot/cpuflags.c
> > @@ -80,6 +80,17 @@ static inline void cpuid(u32 id, u32 *a, u32 *b, u32 *c, u32 *d)
> >  	);
> >  }
> >  
> > +static inline void cpuid_count(u32 id, u32 count,
> > +		u32 *a, u32 *b, u32 *c, u32 *d)
> > +{
> > +	asm volatile(".ifnc %%ebx,%3 ; movl  %%ebx,%3 ; .endif	\n\t"
> > +		     "cpuid					\n\t"
> > +		     ".ifnc %%ebx,%3 ; xchgl %%ebx,%3 ; .endif	\n\t"
> > +		    : "=a" (*a), "=c" (*c), "=d" (*d), EBX_REG (*b)
> > +		    : "a" (id), "c" (count)
> > +	);
> > +}
> 
> Pls make those like cpuid() and cpuid_count() in
> arch/x86/include/asm/processor.h, which explicitly assign ecx and then
> call the underlying helper.
> 
> The cpuid() in cpuflags.c doesn't zero ecx which, if we have to be
> pedantic, it should do. It calls CPUID now with the ptr value of its 4th
> on 64-bit and 3rd arg on 32-bit, respectively, IINM.

Something like this?

diff --git a/arch/x86/boot/cpuflags.c b/arch/x86/boot/cpuflags.c
index 6687ab953257..366aad972025 100644
--- a/arch/x86/boot/cpuflags.c
+++ b/arch/x86/boot/cpuflags.c
@@ -70,16 +70,22 @@ int has_eflag(unsigned long mask)
 # define EBX_REG "=b"
 #endif

-static inline void cpuid(u32 id, u32 *a, u32 *b, u32 *c, u32 *d)
+static inline void cpuid_count(u32 id, u32 count,
+               u32 *a, u32 *b, u32 *c, u32 *d)
 {
+       *a = id;
+       *c = count;
+
        asm volatile(".ifnc %%ebx,%3 ; movl  %%ebx,%3 ; .endif  \n\t"
                     "cpuid                                     \n\t"
                     ".ifnc %%ebx,%3 ; xchgl %%ebx,%3 ; .endif  \n\t"
                    : "=a" (*a), "=c" (*c), "=d" (*d), EBX_REG (*b)
-                   : "a" (id)
+                   : "a" (id), "c" (count)
        );
 }

+#define cpuid(id, a, b, c, d) cpuid_count(id, 0, a, b, c, d)
+
 void get_cpuflags(void)
 {
        u32 max_intel_level, max_amd_level;
-- 
 Kirill A. Shutemov

  parent reply	other threads:[~2016-12-09 15:32 UTC|newest]

Thread overview: 113+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-08 16:21 [RFC, PATCHv1 00/28] 5-level paging Kirill A. Shutemov
2016-12-08 16:21 ` [QEMU, PATCH] x86: implement la57 paging mode Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:48   ` [Qemu-devel] " no-reply
2016-12-08 16:48     ` no-reply
2016-12-08 16:21 ` [RFC, PATCHv1 01/28] asm-generic: introduce 5level-fixup.h Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 02/28] asm-generic: introduce __ARCH_USE_5LEVEL_HACK Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 03/28] arch, mm: convert all architectures to use 5level-fixup.h Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 04/28] asm-generic: introduce <asm-generic/pgtable-nop4d.h> Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 05/28] mm: convert generic code to 5-level paging Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 06/28] x86: basic changes into headers for " Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 07/28] x86: trivial portion of 5-level paging conversion Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 08/28] x86/gup: add 5-level paging support Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 09/28] x86/ident_map: " Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 10/28] x86/mm: add support of p4d_t in vmalloc_fault() Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 11/28] x86/power: support p4d_t in hibernate code Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 12/28] x86/kexec: support p4d_t Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 13/28] x86: convert the rest of the code to " Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 14/28] mm: introduce __p4d_alloc() Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 15/28] x86: detect 5-level paging support Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 20:05   ` Borislav Petkov
2016-12-08 20:08     ` Linus Torvalds
2016-12-08 20:08       ` Linus Torvalds
2016-12-08 20:20       ` Borislav Petkov
2016-12-13 22:44         ` H. Peter Anvin
2016-12-13 22:44           ` H. Peter Anvin
2016-12-13 23:07           ` Boris Petkov
2016-12-13 23:07             ` Boris Petkov
2016-12-15 14:39             ` Borislav Petkov
2016-12-15 14:39               ` Borislav Petkov
2016-12-15 17:52               ` hpa
2016-12-15 17:52                 ` hpa
2016-12-15 19:09                 ` Borislav Petkov
2016-12-15 19:20                   ` Andi Kleen
2016-12-15 19:20                     ` Andi Kleen
2016-12-15 20:52                     ` hpa
2016-12-15 20:52                       ` hpa
2016-12-15 20:57                     ` hpa
2016-12-15 20:57                       ` hpa
2016-12-09 15:32     ` Kirill A. Shutemov [this message]
2016-12-09 16:33       ` Borislav Petkov
2016-12-13 22:50       ` H. Peter Anvin
2016-12-13 22:50         ` H. Peter Anvin
2016-12-08 16:21 ` [RFC, PATCHv1 16/28] x86/asm: remove __VIRTUAL_MASK_SHIFT==47 assert Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 18:39   ` Andy Lutomirski
2016-12-08 19:22     ` Kirill A. Shutemov
2016-12-08 19:22       ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 17/28] x86/mm: define virtual memory map for 5-level paging Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 18:56   ` Randy Dunlap
2016-12-08 19:24     ` Kirill A. Shutemov
2016-12-08 19:24       ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 18/28] x86/paravirt: make paravirt code support " Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 19/28] x86/mm: basic defines/helpers for CONFIG_X86_5LEVEL Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 20/28] x86/dump_pagetables: support 5-level paging Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 21/28] x86/mm: extend kasan to " Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 22/28] x86/espfix: " Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 18:40   ` Andy Lutomirski
2016-12-08 18:40     ` Andy Lutomirski
2016-12-12 14:22     ` Kirill A. Shutemov
2016-12-12 14:22       ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 23/28] x86/mm: add support of additional page table level during early boot Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 24/28] x86/mm: add sync_global_pgds() for configuration with 5-level paging Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 18:42   ` Andy Lutomirski
2016-12-08 19:33     ` Kirill A. Shutemov
2016-12-08 19:33       ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 25/28] x86/mm: make kernel_physical_mapping_init() support " Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 26/28] x86/mm: add support for 5-level paging for KASLR Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 27/28] x86: enable la57 support Kirill A. Shutemov
2016-12-08 16:21   ` Kirill A. Shutemov
2016-12-08 16:21 ` [RFC, PATCHv1 28/28] TESTING-ONLY: bump TASK_SIZE_MAX Kirill A. Shutemov
2016-12-08 18:16 ` [RFC, PATCHv1 00/28] 5-level paging Linus Torvalds
2016-12-08 18:16   ` Linus Torvalds
2016-12-08 18:26   ` hpa
2016-12-08 18:26     ` hpa
2016-12-08 19:20   ` Kirill A. Shutemov
2016-12-08 19:20     ` Kirill A. Shutemov
2016-12-09  5:01 ` Ingo Molnar
2016-12-09  5:01   ` Ingo Molnar
2016-12-09 10:24   ` Arnd Bergmann
2016-12-09 10:51     ` Catalin Marinas
2016-12-09 10:51       ` Catalin Marinas
2016-12-09 10:37   ` Kirill A. Shutemov
2016-12-09 10:37     ` Kirill A. Shutemov
2016-12-09 16:40     ` Andi Kleen
2016-12-09 17:21       ` Kirill A. Shutemov
2016-12-09 17:21         ` Kirill A. Shutemov
2016-12-09 16:49     ` Dave Hansen
2016-12-09 16:49       ` Dave Hansen
2016-12-13 21:06   ` Dave Hansen
2016-12-13 21:06     ` Dave Hansen

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