From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtprelay.synopsys.com ([198.182.47.9]:58598 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726847AbeJCXxM (ORCPT ); Wed, 3 Oct 2018 19:53:12 -0400 From: Vineet Gupta Subject: Re: [PATCH 12/18] arch/tlb: Clean up simple architectures Date: Wed, 3 Oct 2018 17:03:50 +0000 Message-ID: References: <20180926113623.863696043@infradead.org> <20180926114801.146189550@infradead.org> Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Sender: linux-arch-owner@vger.kernel.org List-ID: To: Peter Zijlstra , "will.deacon@arm.com" , "aneesh.kumar@linux.vnet.ibm.com" , "akpm@linux-foundation.org" , "npiggin@gmail.com" Cc: "linux-arch@vger.kernel.org" , "linux-mm@kvack.org" , "linux-kernel@vger.kernel.org" , "linux@armlinux.org.uk" , "heiko.carstens@de.ibm.com" , "riel@surriel.com" , Richard Henderson , Vineet Gupta , Mark Salter , Richard Kuo , Michal Simek , Paul Burton , Greentime Hu , Ley Foon Tan , Jonas Bonn , Helge Deller , "David S. Miller" , Guan Xuetao , Max Filippov Message-ID: <20181003170350.Y1lmGtG2m_qHg_5D5smQdLuEarpVNZ1FxIERwFAh7NA@z> On 09/26/2018 04:56 AM, Peter Zijlstra wrote:=0A= > There are generally two cases:=0A= >=0A= > 1) either the platform has an efficient flush_tlb_range() and=0A= > asm-generic/tlb.h doesn't need any overrides at all.=0A= >=0A= > 2) or an architecture lacks an efficient flush_tlb_range() and=0A= > we override tlb_end_vma() and tlb_flush().=0A= >=0A= > Convert all 'simple' architectures to one of these two forms.=0A= >=0A= > alpha: has no range invalidate -> 2=0A= > arc: already used flush_tlb_range() -> 1=0A= > c6x: has no range invalidate -> 2=0A= > h8300: has no mmu=0A= > hexagon: has an efficient flush_tlb_range() -> 1=0A= > (flush_tlb_mm() is in fact a full range invalidate,=0A= > so no need to shoot down everything)=0A= > m68k: has inefficient flush_tlb_range() -> 2=0A= > microblaze: has no flush_tlb_range() -> 2=0A= > mips: has efficient flush_tlb_range() -> 1=0A= > (even though it currently seems to use flush_tlb_mm())=0A= > nds32: already uses flush_tlb_range() -> 1=0A= > nios2: has inefficient flush_tlb_range() -> 2=0A= > (no limit on range iteration)=0A= > openrisc: has inefficient flush_tlb_range() -> 2=0A= > (no limit on range iteration)=0A= > parisc: already uses flush_tlb_range() -> 1=0A= > sparc32: already uses flush_tlb_range() -> 1=0A= > unicore32: has inefficient flush_tlb_range() -> 2=0A= > (no limit on range iteration)=0A= > xtensa: has efficient flush_tlb_range() -> 1=0A= >=0A= > Cc: Richard Henderson =0A= > Cc: Vineet Gupta =0A= > Cc: Mark Salter =0A= > Cc: Richard Kuo =0A= > Cc: Michal Simek =0A= > Cc: Paul Burton =0A= > Cc: Greentime Hu =0A= > Cc: Ley Foon Tan =0A= > Cc: Jonas Bonn =0A= > Cc: Helge Deller =0A= > Cc: "David S. Miller" =0A= > Cc: Guan Xuetao =0A= > Cc: Max Filippov =0A= > Cc: Will Deacon =0A= > Cc: "Aneesh Kumar K.V" =0A= > Cc: Andrew Morton =0A= > Cc: Nick Piggin =0A= > Signed-off-by: Peter Zijlstra (Intel) =0A= > ---=0A= > arch/alpha/include/asm/tlb.h | 2 --=0A= > arch/arc/include/asm/tlb.h | 23 -----------------------=0A= > arch/c6x/include/asm/tlb.h | 1 +=0A= > arch/h8300/include/asm/tlb.h | 2 --=0A= > arch/hexagon/include/asm/tlb.h | 12 ------------=0A= > arch/m68k/include/asm/tlb.h | 1 -=0A= > arch/microblaze/include/asm/tlb.h | 4 +---=0A= > arch/mips/include/asm/tlb.h | 8 --------=0A= > arch/nds32/include/asm/tlb.h | 10 ----------=0A= > arch/nios2/include/asm/tlb.h | 8 +++++---=0A= > arch/openrisc/include/asm/tlb.h | 6 ++++--=0A= > arch/parisc/include/asm/tlb.h | 13 -------------=0A= > arch/powerpc/include/asm/tlb.h | 1 -=0A= > arch/sparc/include/asm/tlb_32.h | 13 -------------=0A= > arch/unicore32/include/asm/tlb.h | 10 ++++++----=0A= > arch/xtensa/include/asm/tlb.h | 17 -----------------=0A= > 16 files changed, 17 insertions(+), 114 deletions(-)=0A= >=0A= > --- a/arch/alpha/include/asm/tlb.h=0A= > +++ b/arch/alpha/include/asm/tlb.h=0A= > @@ -4,8 +4,6 @@=0A= > =0A= > #define tlb_start_vma(tlb, vma) do { } while (0)=0A= > #define tlb_end_vma(tlb, vma) do { } while (0)=0A= > -#define __tlb_remove_tlb_entry(tlb, pte, addr) do { } while (0)=0A= > -=0A= > #define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)=0A= > =0A= > #include =0A= > --- a/arch/arc/include/asm/tlb.h=0A= > +++ b/arch/arc/include/asm/tlb.h=0A= > @@ -9,29 +9,6 @@=0A= > #ifndef _ASM_ARC_TLB_H=0A= > #define _ASM_ARC_TLB_H=0A= > =0A= > -#define tlb_flush(tlb) \=0A= > -do { \=0A= > - if (tlb->fullmm) \=0A= > - flush_tlb_mm((tlb)->mm); \=0A= > -} while (0)=0A= > -=0A= > -/*=0A= > - * This pair is called at time of munmap/exit to flush cache and TLB ent= ries=0A= > - * for mappings being torn down.=0A= > - * 1) cache-flush part -implemented via tlb_start_vma( ) for VIPT aliasi= ng D$=0A= > - * 2) tlb-flush part - implemted via tlb_end_vma( ) flushes the TLB rang= e=0A= > - *=0A= > - * Note, read https://urldefense.proofpoint.com/v2/url?u=3Dhttp-3A__lkml= .org_lkml_2004_1_15_6&d=3DDwIBaQ&c=3DDPL6_X_6JkXFx7AXWqB0tg&r=3Dc14YS-cH-kd= hTOW89KozFhBtBJgs1zXscZojEZQ0THs&m=3D5jiyvgRek4SKK5DUWDBGufVcuLez5G-jJCh3K-= ndHsg&s=3D7uAzzw_jdAXMfb07B-vGPh3V1vggbTAsB7xL6Kie47A&e=3D=0A= > - */=0A= > -=0A= > -#define tlb_end_vma(tlb, vma) \=0A= > -do { \=0A= > - if (!tlb->fullmm) \=0A= > - flush_tlb_range(vma, vma->vm_start, vma->vm_end); \=0A= > -} while (0)=0A= > -=0A= > -#define __tlb_remove_tlb_entry(tlb, ptep, address)=0A= > -=0A= > #include =0A= > #include =0A= =0A= LGTM per discussion in an earlier thread. However given that for "simpler" = arches=0A= the whole series doesn't apply can you please beef up the changelog so I do= n't go=0A= scratching my head 2 years down the line. It currently describes the hows o= f=0A= things but not exactly whys: shift_arg_pages missing tlb_start_vma,=0A= move_page_tables look dodgy, yady yadda ?=0A= =0A= Thx,=0A= -Vineet=0A= =0A=