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From: Yu-cheng Yu <yu-cheng.yu@intel.com>
To: x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>,
	linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-mm@kvack.org, linux-arch@vger.kernel.org,
	linux-api@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>,
	Andy Lutomirski <luto@kernel.org>,
	Balbir Singh <bsingharora@gmail.com>,
	Borislav Petkov <bp@alien8.de>,
	Cyrill Gorcunov <gorcunov@gmail.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Eugene Syromiatnikov <esyr@redhat.com>,
	Florian Weimer <fweimer@redhat.com>,
	"H.J. Lu" <hjl.tools@gmail.com>, Jann Horn <jannh@google.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Kees Cook <keescook@chromium.org>,
	Mike Kravetz <mike.kravetz@oracle.com>,
	Nadav Amit <nadav.amit@gmail.com>,
	Oleg Nesterov <oleg@redhat.com>, Pavel Machek <pavel@ucw.cz>,
	Peter Zijlstra <peterz@infradead.org>,
	Randy Dunlap <rdunlap@infradead.org>,
	"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
	Vedvyas Shanbhogue <vedvyas.shanbhogue@intel.com>,
	Dave Martin <Dave.Martin@arm.com>,
	Weijiang Yang <weijiang.yang@intel.com>
Cc: Yu-cheng Yu <yu-cheng.yu@intel.com>
Subject: [PATCH v11 03/25] x86/fpu/xstate: Introduce CET MSR XSAVES supervisor states
Date: Mon, 24 Aug 2020 17:25:18 -0700	[thread overview]
Message-ID: <20200825002540.3351-4-yu-cheng.yu@intel.com> (raw)
In-Reply-To: <20200825002540.3351-1-yu-cheng.yu@intel.com>

Control-flow Enforcement Technology (CET) adds five MSRs.  Introduce them
and their XSAVES supervisor states:

    MSR_IA32_U_CET (user-mode CET settings),
    MSR_IA32_PL3_SSP (user-mode Shadow Stack pointer),
    MSR_IA32_PL0_SSP (kernel-mode Shadow Stack pointer),
    MSR_IA32_PL1_SSP (Privilege Level 1 Shadow Stack pointer),
    MSR_IA32_PL2_SSP (Privilege Level 2 Shadow Stack pointer).

Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
---
v11:
- Drop MSR_IA32 prefix for individual bits, and use BIT_ULL().
- Drop MSR_IA32_CET_BITMAP_MASK.

v6:
- Remove __packed from struct cet_user_state, struct cet_kernel_state.

 arch/x86/include/asm/fpu/types.h            | 23 +++++++++++++++--
 arch/x86/include/asm/fpu/xstate.h           |  5 ++--
 arch/x86/include/asm/msr-index.h            | 17 +++++++++++++
 arch/x86/include/uapi/asm/processor-flags.h |  2 ++
 arch/x86/kernel/fpu/xstate.c                | 28 ++++++++++++++++++---
 5 files changed, 68 insertions(+), 7 deletions(-)

diff --git a/arch/x86/include/asm/fpu/types.h b/arch/x86/include/asm/fpu/types.h
index c87364ea6446..2a7037a6f960 100644
--- a/arch/x86/include/asm/fpu/types.h
+++ b/arch/x86/include/asm/fpu/types.h
@@ -115,8 +115,8 @@ enum xfeature {
 	XFEATURE_PT_UNIMPLEMENTED_SO_FAR,
 	XFEATURE_PKRU,
 	XFEATURE_RSRVD_COMP_10,
-	XFEATURE_RSRVD_COMP_11,
-	XFEATURE_RSRVD_COMP_12,
+	XFEATURE_CET_USER,
+	XFEATURE_CET_KERNEL,
 	XFEATURE_RSRVD_COMP_13,
 	XFEATURE_RSRVD_COMP_14,
 	XFEATURE_LBR,
@@ -134,6 +134,8 @@ enum xfeature {
 #define XFEATURE_MASK_Hi16_ZMM		(1 << XFEATURE_Hi16_ZMM)
 #define XFEATURE_MASK_PT		(1 << XFEATURE_PT_UNIMPLEMENTED_SO_FAR)
 #define XFEATURE_MASK_PKRU		(1 << XFEATURE_PKRU)
+#define XFEATURE_MASK_CET_USER		(1 << XFEATURE_CET_USER)
+#define XFEATURE_MASK_CET_KERNEL	(1 << XFEATURE_CET_KERNEL)
 #define XFEATURE_MASK_LBR		(1 << XFEATURE_LBR)
 
 #define XFEATURE_MASK_FPSSE		(XFEATURE_MASK_FP | XFEATURE_MASK_SSE)
@@ -236,6 +238,23 @@ struct pkru_state {
 	u32				pad;
 } __packed;
 
+/*
+ * State component 11 is Control-flow Enforcement user states
+ */
+struct cet_user_state {
+	u64 user_cet;			/* user control-flow settings */
+	u64 user_ssp;			/* user shadow stack pointer */
+};
+
+/*
+ * State component 12 is Control-flow Enforcement kernel states
+ */
+struct cet_kernel_state {
+	u64 kernel_ssp;			/* kernel shadow stack */
+	u64 pl1_ssp;			/* privilege level 1 shadow stack */
+	u64 pl2_ssp;			/* privilege level 2 shadow stack */
+};
+
 /*
  * State component 15: Architectural LBR configuration state.
  * The size of Arch LBR state depends on the number of LBRs (lbr_depth).
diff --git a/arch/x86/include/asm/fpu/xstate.h b/arch/x86/include/asm/fpu/xstate.h
index 14ab815132d4..e4408db88bca 100644
--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -35,7 +35,7 @@
 				      XFEATURE_MASK_BNDCSR)
 
 /* All currently supported supervisor features */
-#define XFEATURE_MASK_SUPERVISOR_SUPPORTED (0)
+#define XFEATURE_MASK_SUPERVISOR_SUPPORTED (XFEATURE_MASK_CET_USER)
 
 /*
  * A supervisor state component may not always contain valuable information,
@@ -62,7 +62,8 @@
  * Unsupported supervisor features. When a supervisor feature in this mask is
  * supported in the future, move it to the supported supervisor feature mask.
  */
-#define XFEATURE_MASK_SUPERVISOR_UNSUPPORTED (XFEATURE_MASK_PT)
+#define XFEATURE_MASK_SUPERVISOR_UNSUPPORTED (XFEATURE_MASK_PT | \
+					      XFEATURE_MASK_CET_KERNEL)
 
 /* All supervisor states including supported and unsupported states. */
 #define XFEATURE_MASK_SUPERVISOR_ALL (XFEATURE_MASK_SUPERVISOR_SUPPORTED | \
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 2859ee4f39a8..25bd727f6fa1 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -912,4 +912,21 @@
 #define MSR_VM_IGNNE                    0xc0010115
 #define MSR_VM_HSAVE_PA                 0xc0010117
 
+/* Control-flow Enforcement Technology MSRs */
+#define MSR_IA32_U_CET		0x6a0 /* user mode cet setting */
+#define MSR_IA32_S_CET		0x6a2 /* kernel mode cet setting */
+#define MSR_IA32_PL0_SSP	0x6a4 /* kernel shstk pointer */
+#define MSR_IA32_PL1_SSP	0x6a5 /* ring-1 shstk pointer */
+#define MSR_IA32_PL2_SSP	0x6a6 /* ring-2 shstk pointer */
+#define MSR_IA32_PL3_SSP	0x6a7 /* user shstk pointer */
+#define MSR_IA32_INT_SSP_TAB	0x6a8 /* exception shstk table */
+
+/* MSR_IA32_U_CET and MSR_IA32_S_CET bits */
+#define CET_SHSTK_EN		BIT_ULL(0)
+#define CET_WRSS_EN		BIT_ULL(1)
+#define CET_ENDBR_EN		BIT_ULL(2)
+#define CET_LEG_IW_EN		BIT_ULL(3)
+#define CET_NO_TRACK_EN		BIT_ULL(4)
+#define CET_WAIT_ENDBR		BIT_ULL(11)
+
 #endif /* _ASM_X86_MSR_INDEX_H */
diff --git a/arch/x86/include/uapi/asm/processor-flags.h b/arch/x86/include/uapi/asm/processor-flags.h
index bcba3c643e63..a8df907e8017 100644
--- a/arch/x86/include/uapi/asm/processor-flags.h
+++ b/arch/x86/include/uapi/asm/processor-flags.h
@@ -130,6 +130,8 @@
 #define X86_CR4_SMAP		_BITUL(X86_CR4_SMAP_BIT)
 #define X86_CR4_PKE_BIT		22 /* enable Protection Keys support */
 #define X86_CR4_PKE		_BITUL(X86_CR4_PKE_BIT)
+#define X86_CR4_CET_BIT		23 /* enable Control-flow Enforcement */
+#define X86_CR4_CET		_BITUL(X86_CR4_CET_BIT)
 
 /*
  * x86-64 Task Priority Register, CR8
diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
index 038e19c0019e..705fd9b94e31 100644
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -38,6 +38,9 @@ static const char *xfeature_names[] =
 	"Processor Trace (unused)"	,
 	"Protection Keys User registers",
 	"unknown xstate feature"	,
+	"Control-flow User registers"	,
+	"Control-flow Kernel registers"	,
+	"unknown xstate feature"	,
 };
 
 static short xsave_cpuid_features[] __initdata = {
@@ -51,6 +54,9 @@ static short xsave_cpuid_features[] __initdata = {
 	X86_FEATURE_AVX512F,
 	X86_FEATURE_INTEL_PT,
 	X86_FEATURE_PKU,
+	-1,		   /* Unused */
+	X86_FEATURE_SHSTK, /* XFEATURE_CET_USER */
+	X86_FEATURE_SHSTK, /* XFEATURE_CET_KERNEL */
 };
 
 /*
@@ -318,6 +324,8 @@ static void __init print_xstate_features(void)
 	print_xstate_feature(XFEATURE_MASK_ZMM_Hi256);
 	print_xstate_feature(XFEATURE_MASK_Hi16_ZMM);
 	print_xstate_feature(XFEATURE_MASK_PKRU);
+	print_xstate_feature(XFEATURE_MASK_CET_USER);
+	print_xstate_feature(XFEATURE_MASK_CET_KERNEL);
 }
 
 /*
@@ -592,6 +600,8 @@ static void check_xstate_against_struct(int nr)
 	XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state);
 	XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM,  struct avx_512_hi16_state);
 	XCHECK_SZ(sz, nr, XFEATURE_PKRU,      struct pkru_state);
+	XCHECK_SZ(sz, nr, XFEATURE_CET_USER,   struct cet_user_state);
+	XCHECK_SZ(sz, nr, XFEATURE_CET_KERNEL, struct cet_kernel_state);
 
 	/*
 	 * Make *SURE* to add any feature numbers in below if
@@ -601,7 +611,8 @@ static void check_xstate_against_struct(int nr)
 	if ((nr < XFEATURE_YMM) ||
 	    (nr >= XFEATURE_MAX) ||
 	    (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR) ||
-	    ((nr >= XFEATURE_RSRVD_COMP_10) && (nr <= XFEATURE_LBR))) {
+	    (nr == XFEATURE_RSRVD_COMP_10) ||
+	    ((nr >= XFEATURE_RSRVD_COMP_13) && (nr <= XFEATURE_LBR))) {
 		WARN_ONCE(1, "no structure for xstate: %d\n", nr);
 		XSTATE_WARN_ON(1);
 	}
@@ -831,8 +842,19 @@ void __init fpu__init_system_xstate(void)
 	 * Clear XSAVE features that are disabled in the normal CPUID.
 	 */
 	for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) {
-		if (!boot_cpu_has(xsave_cpuid_features[i]))
-			xfeatures_mask_all &= ~BIT_ULL(i);
+		if (xsave_cpuid_features[i] == X86_FEATURE_SHSTK) {
+			/*
+			 * X86_FEATURE_SHSTK and X86_FEATURE_IBT share
+			 * same states, but can be enabled separately.
+			 */
+			if (!boot_cpu_has(X86_FEATURE_SHSTK) &&
+			    !boot_cpu_has(X86_FEATURE_IBT))
+				xfeatures_mask_all &= ~BIT_ULL(i);
+		} else {
+			if ((xsave_cpuid_features[i] == -1) ||
+			    !boot_cpu_has(xsave_cpuid_features[i]))
+				xfeatures_mask_all &= ~BIT_ULL(i);
+		}
 	}
 
 	xfeatures_mask_all &= fpu__get_supported_xfeatures_mask();
-- 
2.21.0


  parent reply	other threads:[~2020-08-25  0:33 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-25  0:25 [PATCH v11 00/25] Control-flow Enforcement: Shadow Stack Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 01/25] Documentation/x86: Add CET description Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 02/25] x86/cpufeatures: Add CET CPU feature flags for Control-flow Enforcement Technology (CET) Yu-cheng Yu
2020-08-25  0:25 ` Yu-cheng Yu [this message]
2020-08-25  0:25 ` [PATCH v11 04/25] x86/cet: Add control-protection fault handler Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 05/25] x86/cet/shstk: Add Kconfig option for user-mode Shadow Stack Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 06/25] x86/mm: Change _PAGE_DIRTY to _PAGE_DIRTY_HW Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 07/25] x86/mm: Remove _PAGE_DIRTY_HW from kernel RO pages Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 08/25] x86/mm: Introduce _PAGE_COW Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 09/25] drm/i915/gvt: Change _PAGE_DIRTY to _PAGE_DIRTY_BITS Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 10/25] x86/mm: Update pte_modify for _PAGE_COW Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 11/25] x86/mm: Update ptep_set_wrprotect() and pmdp_set_wrprotect() for transition from _PAGE_DIRTY_HW to _PAGE_COW Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 12/25] mm: Introduce VM_SHSTK for shadow stack memory Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 13/25] x86/mm: Shadow Stack page fault error checking Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 14/25] x86/mm: Update maybe_mkwrite() for shadow stack Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 15/25] mm: Fixup places that call pte_mkwrite() directly Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 16/25] mm: Add guard pages around a shadow stack Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 17/25] mm/mmap: Add shadow stack pages to memory accounting Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 18/25] mm: Update can_follow_write_pte() for shadow stack Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 19/25] mm: Re-introduce do_mmap_pgoff() Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 20/25] x86/cet/shstk: User-mode shadow stack support Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 21/25] x86/cet/shstk: Handle signals for shadow stack Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 22/25] binfmt_elf: Define GNU_PROPERTY_X86_FEATURE_1_AND properties Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 23/25] ELF: Introduce arch_setup_elf_property() Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 24/25] x86/cet/shstk: Handle thread shadow stack Yu-cheng Yu
2020-08-25  0:25 ` [PATCH v11 25/25] x86/cet/shstk: Add arch_prctl functions for " Yu-cheng Yu
2020-08-25  0:36   ` Andy Lutomirski
2020-08-25 18:43     ` Yu, Yu-cheng
2020-08-25 19:19       ` Dave Hansen
2020-08-25 21:04         ` Yu, Yu-cheng
2020-08-25 23:20           ` Dave Hansen
2020-08-25 23:34             ` Yu, Yu-cheng
2020-08-26 16:46               ` Dave Martin
2020-08-26 16:51                 ` Florian Weimer
2020-08-26 17:04                   ` Andy Lutomirski
2020-08-26 18:49                     ` Yu, Yu-cheng
2020-08-26 19:43                       ` H.J. Lu
2020-08-26 19:57                       ` Dave Hansen
2020-08-27 13:26                         ` H.J. Lu
2020-09-01 10:28                           ` Dave Martin
2020-09-01 17:23                             ` Yu, Yu-cheng
2020-09-01 17:45                               ` Andy Lutomirski
2020-09-01 18:11                                 ` Dave Hansen
2020-09-02 13:58                                   ` Dave Martin
     [not found]                                   ` <46dffdfd-92f8-0f05-6164-945f217b0958@intel.com>
2020-09-08 17:57                                     ` Dave Hansen
2020-09-08 18:25                                       ` Yu, Yu-cheng
2020-09-09 22:08                                         ` Yu, Yu-cheng
2020-09-09 22:59                                           ` Dave Hansen
2020-09-09 23:07                                             ` Yu, Yu-cheng
2020-09-09 23:11                                               ` Dave Hansen
2020-09-09 23:25                                                 ` Yu, Yu-cheng
2020-09-09 23:29                                                   ` Dave Hansen
2020-09-09 23:45                                                     ` Yu, Yu-cheng
2020-09-11 22:59                                                     ` Yu-cheng Yu
2020-09-14 14:50                                                       ` [NEEDS-REVIEW] " Dave Hansen
2020-09-14 18:31                                                         ` Andy Lutomirski
2020-09-14 20:44                                                           ` Yu, Yu-cheng
2020-09-14 21:14                                                           ` Dave Hansen
2020-09-16 13:52                                                             ` Andy Lutomirski
2020-09-16 19:25                                                               ` Yu, Yu-cheng
2021-09-14  1:33                                                           ` [NEEDS-REVIEW] " Edgecombe, Rick P
2021-09-14  9:53                                                             ` Borislav Petkov
2021-09-20 16:48                                                             ` Andy Lutomirski
2021-09-23 23:32                                                               ` Edgecombe, Rick P
     [not found]                                                         ` <bf2ab309-f8c4-83da-1c0a-5684e5bc5c82@intel.com>
2020-09-15 19:08                                                           ` Yu-cheng Yu
2020-09-15 19:24                                                             ` Dave Hansen
2020-09-15 20:16                                                               ` Yu, Yu-cheng
2020-08-26 17:08                   ` Dave Martin
2020-08-27 13:18                     ` Florian Weimer
2020-08-27 13:28                       ` H.J. Lu
2020-08-27 13:36                         ` Florian Weimer
2020-08-27 14:07                           ` H.J. Lu
2020-08-27 14:08                             ` H.J. Lu
2020-09-01 17:49                               ` Yu, Yu-cheng
2020-09-01 17:50                                 ` Florian Weimer
2020-09-01 17:58                                   ` Yu, Yu-cheng
2020-09-01 18:17                                     ` Florian Weimer
2020-09-01 18:19                                       ` H.J. Lu
2020-09-01 18:24                                       ` Yu, Yu-cheng
2020-08-27 18:13                           ` Yu, Yu-cheng
2020-08-27 18:56                             ` Andy Lutomirski
2020-08-27 19:33                               ` Yu, Yu-cheng
2020-08-27 19:37                               ` H.J. Lu
2020-08-28  1:35                                 ` Andy Lutomirski
2020-08-28  1:44                                   ` H.J. Lu
2020-08-28  6:23                                     ` Florian Weimer
2020-08-28 11:37                                       ` H.J. Lu
2020-08-28 17:39                                         ` Andy Lutomirski
2020-08-28 17:45                                           ` H.J. Lu

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