From: Christoph Hellwig <hch@lst.de>
To: guoren@kernel.org
Cc: anup.patel@wdc.com, palmerdabbelt@google.com, arnd@arndb.de,
hch@lst.de, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org,
Guo Ren <guoren@linux.alibaba.com>
Subject: Re: [PATCH V5 2/3] riscv: Add ASID-based tlbflushing methods
Date: Mon, 31 May 2021 08:17:42 +0200 [thread overview]
Message-ID: <20210531061742.GB824@lst.de> (raw)
In-Reply-To: <1622393366-46079-3-git-send-email-guoren@kernel.org>
On Sun, May 30, 2021 at 04:49:25PM +0000, guoren@kernel.org wrote:
> From: Guo Ren <guoren@linux.alibaba.com>
>
> Implement optimized version of the tlb flushing routines for systems
> using ASIDs. These are behind the use_asid_allocator static branch to
> not affect existing systems not using ASIDs.
I still think the code duplication and exposing of new code in a global
header here is a bad idea and would suggest the version I sent instead.
next prev parent reply other threads:[~2021-05-31 6:17 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-30 16:49 [PATCH V5 0/3] riscv: Fixup asid_allocator remaining issues guoren
2021-05-30 16:49 ` [PATCH V5 1/3] riscv: Use global mappings for kernel pages guoren
2021-05-30 16:49 ` [PATCH V5 2/3] riscv: Add ASID-based tlbflushing methods guoren
2021-05-31 6:17 ` Christoph Hellwig [this message]
2021-05-31 12:20 ` Guo Ren
2021-05-30 16:49 ` [PATCH V5 3/3] riscv: tlbflush: Optimize coding convention guoren
2021-06-06 9:03 [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1 guoren
2021-06-06 9:03 ` [PATCH V5 2/3] riscv: Add ASID-based tlbflushing methods guoren
2021-06-06 14:38 ` Christoph Hellwig
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