linux-arch.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Steven Price <steven.price@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
	linux-arm-kernel@lists.infradead.org
Cc: linux-arch@vger.kernel.org,
	Suzuki K Poulose <Suzuki.Poulose@arm.com>,
	Szabolcs Nagy <szabolcs.nagy@arm.com>,
	Andrey Konovalov <andreyknvl@google.com>,
	Kevin Brodsky <kevin.brodsky@arm.com>,
	Peter Collingbourne <pcc@google.com>,
	linux-mm@kvack.org, Andrew Morton <akpm@linux-foundation.org>,
	Vincenzo Frascino <vincenzo.frascino@arm.com>,
	Will Deacon <will@kernel.org>,
	Dave P Martin <Dave.Martin@arm.com>
Subject: Re: [PATCH v6 02/26] arm64: mte: CPU feature detection and initial sysreg configuration
Date: Mon, 13 Jul 2020 11:08:15 +0100	[thread overview]
Message-ID: <2fb4b560-fb2f-7689-05f7-d908b55cd1eb@arm.com> (raw)
In-Reply-To: <20200703153718.16973-3-catalin.marinas@arm.com>

On 03/07/2020 16:36, Catalin Marinas wrote:
> From: Vincenzo Frascino <vincenzo.frascino@arm.com>
> 
> Add the cpufeature and hwcap entries to detect the presence of MTE on
> the boot CPUs (primary and secondary). Any late secondary CPU not
> supporting the feature, if detected during boot, will be parked.
> 
> In addition, add the minimum SCTLR_EL1 and HCR_EL2 bits for enabling
> MTE. Without subsequent setting of MAIR, these bits do not have an
> effect on tag checking.
> 
> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
> Co-developed-by: Catalin Marinas <catalin.marinas@arm.com>
> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com>

This commit causes the feature bit to be exposed to a guest, but we
don't at this point have any way of handling a guest which attempts to
use MTE.

This is 'fixed' by the first patch of my KVM MTE series[1], but perhaps
the chunk modifying arch/arm64/kvm/sys_regs.c (see below) should be included here
instead? That way we hide the feature until we're ready for a guest with
MTE support.

Steve
  [1] https://lore.kernel.org/r/20200713100102.53664-2-steven.price@arm.com

----8<----
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index baf5ce9225ce..5ca974c93bd4 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1104,6 +1104,8 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
  		if (!vcpu_has_sve(vcpu))
  			val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT);
  		val &= ~(0xfUL << ID_AA64PFR0_AMU_SHIFT);
+	} else if (id == SYS_ID_AA64PFR1_EL1) {
+		val &= ~(0xfUL << ID_AA64PFR1_MTE_SHIFT);
  	} else if (id == SYS_ID_AA64ISAR1_EL1 && !vcpu_has_ptrauth(vcpu)) {
  		val &= ~((0xfUL << ID_AA64ISAR1_APA_SHIFT) |
  			 (0xfUL << ID_AA64ISAR1_API_SHIFT) |

  reply	other threads:[~2020-07-13 10:08 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-03 15:36 [PATCH v6 00/26] arm64: Memory Tagging Extension user-space support Catalin Marinas
2020-07-03 15:36 ` Catalin Marinas
2020-07-03 15:36 ` [PATCH v6 01/26] arm64: mte: system register definitions Catalin Marinas
2020-07-03 15:36 ` [PATCH v6 02/26] arm64: mte: CPU feature detection and initial sysreg configuration Catalin Marinas
2020-07-13 10:08   ` Steven Price [this message]
2020-07-13 17:45     ` Catalin Marinas
2020-07-03 15:36 ` [PATCH v6 03/26] arm64: mte: Use Normal Tagged attributes for the linear map Catalin Marinas
2020-07-03 15:36 ` [PATCH v6 04/26] arm64: mte: Add specific SIGSEGV codes Catalin Marinas
2020-07-03 15:36 ` [PATCH v6 05/26] arm64: mte: Handle synchronous and asynchronous tag check faults Catalin Marinas
2020-07-03 15:36 ` [PATCH v6 06/26] mm: Add PG_arch_2 page flag Catalin Marinas
2020-07-06  8:24   ` David Hildenbrand
2020-07-06  8:24     ` David Hildenbrand
2020-07-06 11:21     ` Catalin Marinas
2020-07-06 12:42       ` David Hildenbrand
2020-07-06 12:42         ` David Hildenbrand
2020-07-03 15:36 ` [PATCH v6 07/26] mm: Preserve the PG_arch_* flags in __split_huge_page_tail() Catalin Marinas
2020-07-06 14:16   ` David Hildenbrand
2020-07-06 14:16     ` David Hildenbrand
2020-07-06 16:30     ` Catalin Marinas
2020-07-06 17:56       ` David Hildenbrand
2020-07-08 12:17         ` Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 08/26] arm64: mte: Clear the tags when a page is mapped in user-space with PROT_MTE Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 09/26] arm64: mte: Tags-aware copy_{user_,}highpage() implementations Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 10/26] arm64: Avoid unnecessary clear_user_page() indirection Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 11/26] arm64: mte: Tags-aware aware memcmp_pages() implementation Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 12/26] mm: Introduce arch_calc_vm_flag_bits() Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 13/26] arm64: mte: Add PROT_MTE support to mmap() and mprotect() Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 14/26] mm: Introduce arch_validate_flags() Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 15/26] arm64: mte: Validate the PROT_MTE request via arch_validate_flags() Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 16/26] mm: Allow arm64 mmap(PROT_MTE) on RAM-based files Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 17/26] arm64: mte: Allow user control of the tag check mode via prctl() Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 18/26] arm64: mte: Allow user control of the generated random tags " Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 19/26] arm64: mte: Restore the GCR_EL1 register after a suspend Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 20/26] arm64: mte: Add PTRACE_{PEEK,POKE}MTETAGS support Catalin Marinas
2020-07-09 14:41   ` Luis Machado
2020-07-03 15:37 ` [PATCH v6 21/26] fs: Handle intra-page faults in copy_mount_options() Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 22/26] mm: Add arch hooks for saving/restoring tags Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 23/26] arm64: mte: Enable swap of tagged pages Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 24/26] arm64: mte: Save tags when hibernating Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 25/26] arm64: mte: Kconfig entry Catalin Marinas
2020-07-03 15:37 ` [PATCH v6 26/26] arm64: mte: Add Memory Tagging Extension documentation Catalin Marinas
2020-07-09  9:32   ` Szabolcs Nagy
2020-07-09 14:43     ` Catalin Marinas

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=2fb4b560-fb2f-7689-05f7-d908b55cd1eb@arm.com \
    --to=steven.price@arm.com \
    --cc=Dave.Martin@arm.com \
    --cc=Suzuki.Poulose@arm.com \
    --cc=akpm@linux-foundation.org \
    --cc=andreyknvl@google.com \
    --cc=catalin.marinas@arm.com \
    --cc=kevin.brodsky@arm.com \
    --cc=linux-arch@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-mm@kvack.org \
    --cc=pcc@google.com \
    --cc=szabolcs.nagy@arm.com \
    --cc=vincenzo.frascino@arm.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).