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[209.85.167.46]) by smtp.gmail.com with ESMTPSA id a1sm665920lff.215.2021.06.04.10.38.59 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 04 Jun 2021 10:39:00 -0700 (PDT) Received: by mail-lf1-f46.google.com with SMTP id f11so15212669lfq.4 for ; Fri, 04 Jun 2021 10:38:59 -0700 (PDT) X-Received: by 2002:a05:6512:baa:: with SMTP id b42mr3435945lfv.487.1622828339731; Fri, 04 Jun 2021 10:38:59 -0700 (PDT) MIME-Version: 1.0 References: <20210604172407.GJ18427@gate.crashing.org> In-Reply-To: <20210604172407.GJ18427@gate.crashing.org> From: Linus Torvalds Date: Fri, 4 Jun 2021 10:38:43 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [RFC] LKMM: Add volatile_if() To: Segher Boessenkool Cc: Peter Zijlstra , Will Deacon , "Paul E. McKenney" , Alan Stern , Andrea Parri , Boqun Feng , Nick Piggin , David Howells , Jade Alglave , Luc Maranget , Akira Yokosawa , Linux Kernel Mailing List , linux-toolchains@vger.kernel.org, linux-arch Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org On Fri, Jun 4, 2021 at 10:27 AM Segher Boessenkool wrote: > > > Of course, we might want to make sure that the compiler doesn't go > > "oh, empty asm, I can ignore it", > > It isn't allowed to do that. GCC has this arguable misfeature where it > doesn't show empty asm in the assembler output, but that has no bearing > on anything but how human-readable the output is. That sounds about right, but we have had people talking about the compiler looking inside the asm string before. So it worries me that some compiler person might at some point go all breathy-voice on us and say "I am altering the deal. Pray I don't alter it any further". Side note: when grepping for what "barrier()" does on different architectures and different compilers, I note that yes, it really is just an empty asm volatile with a "memory" barrier. That should in all way sbe sufficient. BUT. There's this really odd comment in that talks about some "ECC" compiler: /* Intel ECC compiler doesn't support gcc specific asm stmts. * It uses intrinsics to do the equivalent things. */ and it defines it as "__memory_barrier()". This seems to be an ia64 thing, but: - I cannot get google to find me any documentation on such an intrinsic - it seems to be bogus anyway, since we have "asm volatile" usage in at least arch/ia64/mm/tlb.c So I do note that "barrier()" has an odd definition in one odd ia64 case, and I can't find the semantics for it. Admittedly I also cannot find it in myself to care. I don't think that "Intel ECC" compiler case actually exists, and even if it does I don't think itanium is relevant any more. But it was an odd detail on what "barrier()" actually might mean to the compiler. Linus