From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01334C4727E for ; Fri, 25 Sep 2020 16:31:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AC93A2396D for ; Fri, 25 Sep 2020 16:31:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1601051516; bh=Ik7sogL+z9aD/+1OiO4uM25gNcDglZeUy/6lyvSwMb4=; h=References:In-Reply-To:From:Date:Subject:To:Cc:List-ID:From; b=jnJo3otvIoklZFt0Q5A3UVKtSoeyOTUUhNAzprfQFzOLUk7ViGuGTY81uApbdhSJR TBz1fFuCxM9EblQVgb39RpYw0fcCZH/rKU4ZxJC7T+iO+16uoyAMwGWCZl0UutVtBU hKEwLDLO/j+rQZizEYT6f5pmDBeUU4ZupLcBw39s= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728148AbgIYQb4 (ORCPT ); Fri, 25 Sep 2020 12:31:56 -0400 Received: from mail.kernel.org ([198.145.29.99]:60622 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727402AbgIYQbz (ORCPT ); Fri, 25 Sep 2020 12:31:55 -0400 Received: from mail-wr1-f41.google.com (mail-wr1-f41.google.com [209.85.221.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 89F0923718 for ; Fri, 25 Sep 2020 16:31:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1601051514; bh=Ik7sogL+z9aD/+1OiO4uM25gNcDglZeUy/6lyvSwMb4=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=nm1XxwGHIt9UmR/Ifr4xaeqfrQvzLDMgtpU5lpUmSpR33k/zrqbBOn3hX+AwEosps 2RQ7KCKnD7imgUyW9DiA/EdUWTNV7LG5Q7VMUEG/SR1m2R2ImEta9ouGe2Bl078/bI 0V179iT1PxrQibpFo9qCprANqXPllF8qydxgC0vw= Received: by mail-wr1-f41.google.com with SMTP id k15so4224094wrn.10 for ; Fri, 25 Sep 2020 09:31:54 -0700 (PDT) X-Gm-Message-State: AOAM530Gr+HbBvgKuIirvI3LBChWsfSMpOtGrCItJTR7yHT+eqca9rNU 68mDbYuhqI4J2YtvegE4cBJINfVemEoyOizbz5ehSQ== X-Google-Smtp-Source: ABdhPJwloz7GRCeaksqcAiQSK6BA/smLdlgKTRsnAcqj22VT9muQh8MWEkpeHivxaVg9kyXoGTbw7yd3PH1Uou0uWMU= X-Received: by 2002:a5d:5281:: with SMTP id c1mr5368504wrv.184.1601051512977; Fri, 25 Sep 2020 09:31:52 -0700 (PDT) MIME-Version: 1.0 References: <20200925145804.5821-1-yu-cheng.yu@intel.com> <20200925145804.5821-9-yu-cheng.yu@intel.com> In-Reply-To: <20200925145804.5821-9-yu-cheng.yu@intel.com> From: Andy Lutomirski Date: Fri, 25 Sep 2020 09:31:40 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v13 8/8] x86/vsyscall/64: Fixup Shadow Stack and Indirect Branch Tracking for vsyscall emulation To: Yu-cheng Yu Cc: X86 ML , "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , LKML , "open list:DOCUMENTATION" , Linux-MM , linux-arch , Linux API , Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , Weijiang Yang , Pengfei Xu Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org On Fri, Sep 25, 2020 at 7:58 AM Yu-cheng Yu wrote: > > Vsyscall entry points are effectively branch targets. Mark them with > ENDBR64 opcodes. When emulating the RET instruction, unwind shadow stack > and reset IBT state machine. > > Signed-off-by: Yu-cheng Yu > --- > v13: > - Check shadow stack address is canonical. > - Change from writing to MSRs to writing to CET xstate. > > arch/x86/entry/vsyscall/vsyscall_64.c | 34 +++++++++++++++++++++++ > arch/x86/entry/vsyscall/vsyscall_emu_64.S | 9 ++++++ > arch/x86/entry/vsyscall/vsyscall_trace.h | 1 + > 3 files changed, 44 insertions(+) > > diff --git a/arch/x86/entry/vsyscall/vsyscall_64.c b/arch/x86/entry/vsyscall/vsyscall_64.c > index 44c33103a955..315ee3572664 100644 > --- a/arch/x86/entry/vsyscall/vsyscall_64.c > +++ b/arch/x86/entry/vsyscall/vsyscall_64.c > @@ -38,6 +38,9 @@ > #include > #include > #include > +#include > +#include > +#include > > #define CREATE_TRACE_POINTS > #include "vsyscall_trace.h" > @@ -286,6 +289,37 @@ bool emulate_vsyscall(unsigned long error_code, > /* Emulate a ret instruction. */ > regs->ip = caller; > regs->sp += 8; > + > +#ifdef CONFIG_X86_CET > + if (tsk->thread.cet.shstk_size || tsk->thread.cet.ibt_enabled) { > + struct cet_user_state *cet; > + struct fpu *fpu; > + > + fpu = &tsk->thread.fpu; > + fpregs_lock(); > + > + if (!test_thread_flag(TIF_NEED_FPU_LOAD)) { > + copy_fpregs_to_fpstate(fpu); > + set_thread_flag(TIF_NEED_FPU_LOAD); > + } > + > + cet = get_xsave_addr(&fpu->state.xsave, XFEATURE_CET_USER); > + if (!cet) { > + fpregs_unlock(); > + goto sigsegv; I *think* your patchset tries to keep cet.shstk_size and cet.ibt_enabled in sync with the MSR, in which case it should be impossible to get here, but a comment and a warning would be much better than a random sigsegv. Shouldn't we have a get_xsave_addr_or_allocate() that will never return NULL but instead will mark the state as in use and set up the init state if the feature was previously not in use?