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[209.85.219.180]) by smtp.gmail.com with ESMTPSA id p11-20020ac8460b000000b003d4008dccb7sm1542603qtn.48.2023.03.15.00.43.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 15 Mar 2023 00:43:57 -0700 (PDT) Received: by mail-yb1-f180.google.com with SMTP id t4so18214426ybg.11; Wed, 15 Mar 2023 00:43:56 -0700 (PDT) X-Received: by 2002:a05:6902:188:b0:a99:de9d:d504 with SMTP id t8-20020a056902018800b00a99de9dd504mr25136921ybh.12.1678866236647; Wed, 15 Mar 2023 00:43:56 -0700 (PDT) MIME-Version: 1.0 References: <20230315051444.3229621-1-willy@infradead.org> <20230315051444.3229621-15-willy@infradead.org> In-Reply-To: <20230315051444.3229621-15-willy@infradead.org> From: Geert Uytterhoeven Date: Wed, 15 Mar 2023 08:43:44 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 14/36] m68k: Implement the new page table range API To: "Matthew Wilcox (Oracle)" Cc: linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, linux-m68k@lists.linux-m68k.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org Hi Willy, On Wed, Mar 15, 2023 at 6:14 AM Matthew Wilcox (Oracle) wrote: > Add PFN_PTE_SHIFT, update_mmu_cache_range(), flush_icache_pages() and > flush_dcache_folio(). > > Signed-off-by: Matthew Wilcox (Oracle) Thanks for your patch! > --- a/arch/m68k/include/asm/cacheflush_mm.h > +++ b/arch/m68k/include/asm/cacheflush_mm.h > @@ -220,24 +220,29 @@ static inline void flush_cache_page(struct vm_area_struct *vma, unsigned long vm > > /* Push the page at kernel virtual address and clear the icache */ > /* RZ: use cpush %bc instead of cpush %dc, cinv %ic */ > -static inline void __flush_page_to_ram(void *vaddr) > +static inline void __flush_pages_to_ram(void *vaddr, unsigned int nr) > { > if (CPU_IS_COLDFIRE) { > unsigned long addr, start, end; > addr = ((unsigned long) vaddr) & ~(PAGE_SIZE - 1); > start = addr & ICACHE_SET_MASK; > - end = (addr + PAGE_SIZE - 1) & ICACHE_SET_MASK; > + end = (addr + nr * PAGE_SIZE - 1) & ICACHE_SET_MASK; > if (start > end) { > flush_cf_bcache(0, end); > end = ICACHE_MAX_ADDR; > } > flush_cf_bcache(start, end); > } else if (CPU_IS_040_OR_060) { > - __asm__ __volatile__("nop\n\t" > - ".chip 68040\n\t" > - "cpushp %%bc,(%0)\n\t" > - ".chip 68k" > - : : "a" (__pa(vaddr))); > + unsigned long paddr = __pa(vaddr); > + > + do { > + __asm__ __volatile__("nop\n\t" > + ".chip 68040\n\t" > + "cpushp %%bc,(%0)\n\t" > + ".chip 68k" > + : : "a" (paddr)); > + paddr += PAGE_SIZE; > + } while (--nr); Please use "while (nr--) { ... }", to protect against anyone ever calling this with nr == 0. The rest LGTM, I'll give it a try shortly... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds