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([2404:f801:9000:1a:efea::4b1]) by smtp.gmail.com with ESMTPSA id f6sm2629239pfb.28.2021.06.10.07.15.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 10 Jun 2021 07:15:59 -0700 (PDT) Subject: Re: [RFC PATCH V3 04/11] HV: Add Write/Read MSR registers via ghcb To: Joerg Roedel Cc: kys@microsoft.com, haiyangz@microsoft.com, sthemmin@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, x86@kernel.org, hpa@zytor.com, arnd@arndb.de, dave.hansen@linux.intel.com, luto@kernel.org, peterz@infradead.org, akpm@linux-foundation.org, kirill.shutemov@linux.intel.com, rppt@kernel.org, hannes@cmpxchg.org, cai@lca.pw, krish.sadhukhan@oracle.com, saravanand@fb.com, Tianyu.Lan@microsoft.com, konrad.wilk@oracle.com, hch@lst.de, m.szyprowski@samsung.com, robin.murphy@arm.com, boris.ostrovsky@oracle.com, jgross@suse.com, sstabellini@kernel.org, will@kernel.org, xen-devel@lists.xenproject.org, davem@davemloft.net, kuba@kernel.org, jejb@linux.ibm.com, martin.petersen@oracle.com, iommu@lists.linux-foundation.org, linux-arch@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org, netdev@vger.kernel.org, vkuznets@redhat.com, thomas.lendacky@amd.com, brijesh.singh@amd.com, sunilmut@microsoft.com References: <20210530150628.2063957-1-ltykernel@gmail.com> <20210530150628.2063957-5-ltykernel@gmail.com> From: Tianyu Lan Message-ID: Date: Thu, 10 Jun 2021 22:15:46 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org On 6/9/2021 8:46 PM, Joerg Roedel wrote: > On Sun, May 30, 2021 at 11:06:21AM -0400, Tianyu Lan wrote: >> +void hv_ghcb_msr_write(u64 msr, u64 value) >> +{ >> + union hv_ghcb *hv_ghcb; >> + void **ghcb_base; >> + unsigned long flags; >> + >> + if (!ms_hyperv.ghcb_base) >> + return; >> + >> + local_irq_save(flags); >> + ghcb_base = (void **)this_cpu_ptr(ms_hyperv.ghcb_base); >> + hv_ghcb = (union hv_ghcb *)*ghcb_base; >> + if (!hv_ghcb) { >> + local_irq_restore(flags); >> + return; >> + } >> + >> + memset(hv_ghcb, 0x00, HV_HYP_PAGE_SIZE); >> + >> + hv_ghcb->ghcb.protocol_version = 1; >> + hv_ghcb->ghcb.ghcb_usage = 0; >> + >> + ghcb_set_sw_exit_code(&hv_ghcb->ghcb, SVM_EXIT_MSR); >> + ghcb_set_rcx(&hv_ghcb->ghcb, msr); >> + ghcb_set_rax(&hv_ghcb->ghcb, lower_32_bits(value)); >> + ghcb_set_rdx(&hv_ghcb->ghcb, value >> 32); >> + ghcb_set_sw_exit_info_1(&hv_ghcb->ghcb, 1); >> + ghcb_set_sw_exit_info_2(&hv_ghcb->ghcb, 0); >> + >> + VMGEXIT(); > > This is not safe to use from NMI context. You need at least some > checking or WARN_ON/assertion/whatever to catch cases where this is > violated. Otherwise it will result in some hard to debug bug reports. > Nice catch. Will update in the next version. Thanks.