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From: Suman Anna <s-anna@ti.com>
To: Crystal Guo <crystal.guo@mediatek.com>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"Yong Liang (梁勇)" <Yong.Liang@mediatek.com>,
	srv_heupstream <srv_heupstream@mediatek.com>,
	"Seiya Wang (王迺君)" <seiya.wang@mediatek.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Fan Chen (陳凡)" <fan.chen@mediatek.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"Yingjoe Chen (陳英洲)" <Yingjoe.Chen@mediatek.com>,
	"Stanley Chu (朱原陞)" <stanley.chu@mediatek.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [v4,3/4] reset-controller: ti: introduce a new reset handler
Date: Wed, 9 Sep 2020 10:39:47 -0500	[thread overview]
Message-ID: <096362e9-dee8-4e7a-2518-47328068c2fd@ti.com> (raw)
In-Reply-To: <1599620279.14806.18.camel@mhfsdcap03>

On 9/8/20 9:57 PM, Crystal Guo wrote:
> On Thu, 2020-09-03 at 07:40 +0800, Suman Anna wrote:
>> Hi Crystal,
>>
>> On 8/16/20 10:03 PM, Crystal Guo wrote:
>>> Introduce ti_syscon_reset() to integrate assert and deassert together.
>>> If some modules need do serialized assert and deassert operations
>>> to reset itself, reset_control_reset can be called for convenience.
>>
>> There are multiple changes in this same patch. I think you should split this
>> functionality away from the change for the regmap_update_bits() to
>> regmap_write_bits(), similar to what you have done in your v2 Patch 4.
>>
> 
> Thanks for your suggestion.
> I will split this patch in the next version.
> 
>>>
>>> Such as reset-qcom-aoss.c, it integrates assert and deassert together
>>> by 'reset' method. MTK Socs also need this method to perform reset.
>>>
>>> Signed-off-by: Crystal Guo <crystal.guo@mediatek.com>
>>> ---
>>>  drivers/reset/reset-ti-syscon.c | 26 ++++++++++++++++++++++++--
>>>  1 file changed, 24 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c
>>> index a2635c21db7f..08289342f9af 100644
>>> --- a/drivers/reset/reset-ti-syscon.c
>>> +++ b/drivers/reset/reset-ti-syscon.c
>>> @@ -15,6 +15,7 @@
>>>   * GNU General Public License for more details.
>>>   */
>>>  
>>> +#include <linux/delay.h>
>>>  #include <linux/mfd/syscon.h>
>>>  #include <linux/module.h>
>>>  #include <linux/of.h>
>>> @@ -56,6 +57,7 @@ struct ti_syscon_reset_data {
>>>  	struct regmap *regmap;
>>>  	struct ti_syscon_reset_control *controls;
>>>  	unsigned int nr_controls;
>>> +	unsigned int reset_duration_us;
>>>  };
>>>  
>>>  #define to_ti_syscon_reset_data(rcdev)	\
>>> @@ -89,7 +91,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev,
>>>  	mask = BIT(control->assert_bit);
>>>  	value = (control->flags & ASSERT_SET) ? mask : 0x0;
>>>  
>>> -	return regmap_update_bits(data->regmap, control->assert_offset, mask, value);
>>> +	return regmap_write_bits(data->regmap, control->assert_offset, mask, value);
>>>  }
>>>  
>>>  /**
>>> @@ -120,7 +122,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev,
>>>  	mask = BIT(control->deassert_bit);
>>>  	value = (control->flags & DEASSERT_SET) ? mask : 0x0;
>>>  
>>> -	return regmap_update_bits(data->regmap, control->deassert_offset, mask, value);
>>> +	return regmap_write_bits(data->regmap, control->deassert_offset, mask, value);
>>>  }
>>>  
>>>  /**
>>> @@ -158,9 +160,26 @@ static int ti_syscon_reset_status(struct reset_controller_dev *rcdev,
>>>  		!(control->flags & STATUS_SET);
>>>  }
>>>  
>>> +static int ti_syscon_reset(struct reset_controller_dev *rcdev,
>>> +				  unsigned long id)
>>> +{
>>> +	struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev);
>>> +	int ret;
>>> +
>>> +	ret = ti_syscon_reset_assert(rcdev, id);
>>> +	if (ret)
>>> +		return ret;
>>> +
>>> +	if (data->reset_duration_us)
>>> +		usleep_range(data->reset_duration_us, data->reset_duration_us * 2);
>>> +
>>> +	return ti_syscon_reset_deassert(rcdev, id);
>>
>> I echo Philipp's comments [1] from your original v1 series about this. We don't
>> need a property to distinguish this, but you could add a flag using match data
>> and Mediatek compatible, and use that within this function, or optionally set
>> this ops based on compatible (whatever is preferred by Philipp).
>>
>> regards
>> Suman
>>
>> [1] https://patchwork.kernel.org/comment/23519193/
>>
> Hi Suman, Philipp
> 
> Which method would you recommend more?
> 1. like v2 patch, but assign the flag "data->assert_deassert_together"
> directly (maybe rename "assert_deassert_together" to
> "reset_op_available")
> 
> 2. use Mediatek compatible to decide the reset handler available or not.

I would go with this option. Anyway, I think you might have to add the reset SoC
data as well, based on Rob's comment on the binding.

regards
Suman

> 
> Thanks
> Crystal
> 
>>> +}
>>> +
>>>  static const struct reset_control_ops ti_syscon_reset_ops = {
>>>  	.assert		= ti_syscon_reset_assert,
>>>  	.deassert	= ti_syscon_reset_deassert,
>>> +	.reset		= ti_syscon_reset,
>>>  	.status		= ti_syscon_reset_status,
>>>  };
>>>  
>>> @@ -204,6 +223,9 @@ static int ti_syscon_reset_probe(struct platform_device *pdev)
>>>  		controls[i].flags = be32_to_cpup(list++);
>>>  	}
>>>  
>>> +	of_property_read_u32(pdev->dev.of_node,	"reset-duration-us",
>>> +				&data->reset_duration_us);
>>> +
>>>  	data->rcdev.ops = &ti_syscon_reset_ops;
>>>  	data->rcdev.owner = THIS_MODULE;
>>>  	data->rcdev.of_node = np;
>>>
>>
> 


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  reply	other threads:[~2020-09-09 15:41 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-17  3:03 [v4,0/4] introduce TI reset controller for MT8192 SoC Crystal Guo
2020-08-17  3:03 ` [v4, 1/4] dt-binding: reset-controller: ti: add reset-duration-us property Crystal Guo
2020-08-25 17:42   ` Rob Herring
2020-08-26 11:09     ` [v4,1/4] " Crystal Guo
2020-08-17  3:03 ` [v4, 2/4] dt-binding: reset-controller: ti: add 'mediatek, infra-reset' to compatible Crystal Guo
2020-08-25 19:02   ` [v4,2/4] dt-binding: reset-controller: ti: add 'mediatek,infra-reset' " Rob Herring
2020-08-26 11:09     ` Crystal Guo
2020-09-02 23:25       ` Suman Anna
2020-09-08 18:49         ` Rob Herring
2020-09-09 15:10           ` Suman Anna
2020-09-09 18:20             ` Rob Herring
2020-08-17  3:03 ` [v4,3/4] reset-controller: ti: introduce a new reset handler Crystal Guo
2020-09-02 23:40   ` Suman Anna
2020-09-09  2:57     ` Crystal Guo
2020-09-09 15:39       ` Suman Anna [this message]
2020-09-11  2:42         ` Crystal Guo
2020-09-11  2:52           ` Suman Anna
2020-09-11  6:07             ` Crystal Guo
2020-09-11 14:26               ` Philipp Zabel
2020-09-11 14:44                 ` Suman Anna
2020-09-14 14:00                   ` Crystal Guo
2020-09-29 13:54                     ` Crystal Guo
2020-08-17  3:03 ` [v4,4/4] arm64: dts: mt8192: add infracfg_rst node Crystal Guo
2020-09-02 23:29   ` Suman Anna
2020-09-08 13:26     ` Crystal Guo
2020-09-08 15:51       ` Suman Anna
     [not found] ` <5065a23627a34212aa62df646dbf00ee@mtkmbs05n1.mediatek.inc>
2020-09-02  3:03   ` [v4,0/4] introduce TI reset controller for MT8192 SoC Crystal Guo

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