From: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> To: Will Deacon <will@kernel.org> Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, jacob.jun.pan@linux.intel.com, joro@8bytes.org, will.deacon@arm.com, linux-kernel@vger.kernel.org, eric.auger@redhat.com, iommu@lists.linux-foundation.org, robh+dt@kernel.org, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 4/8] iommu/arm-smmu-v3: Add support for Substream IDs Date: Thu, 4 Jul 2019 10:33:52 +0100 Message-ID: <104a20b7-ebb1-1569-3f6b-94438b9dbf76@arm.com> (raw) In-Reply-To: <20190626180025.g4clm6qnbbna65de@willie-the-truck> On 26/06/2019 19:00, Will Deacon wrote: > On Mon, Jun 10, 2019 at 07:47:10PM +0100, Jean-Philippe Brucker wrote: >> At the moment, the SMMUv3 driver implements only one stage-1 or stage-2 >> page directory per device. However SMMUv3 allows more than one address >> space for some devices, by providing multiple stage-1 page directories. In >> addition to the Stream ID (SID), that identifies a device, we can now have >> Substream IDs (SSID) identifying an address space. In PCIe, SID is called >> Requester ID (RID) and SSID is called Process Address-Space ID (PASID). >> >> Prepare the driver for SSID support, by adding context descriptor tables >> in STEs (previously a single static context descriptor). A complete >> stage-1 walk is now performed like this by the SMMU: >> >> Stream tables Ctx. tables Page tables >> +--------+ ,------->+-------+ ,------->+-------+ >> : : | : : | : : >> +--------+ | +-------+ | +-------+ >> SID->| STE |---' SSID->| CD |---' IOVA->| PTE |--> IPA >> +--------+ +-------+ +-------+ >> : : : : : : >> +--------+ +-------+ +-------+ >> >> Implement a single level of context descriptor table for now, but as with >> stream and page tables, an SSID can be split to index multiple levels of >> tables. >> >> In all stream table entries, we set S1DSS=SSID0 mode, making translations >> without an SSID use context descriptor 0. Although it would be possible by >> setting S1DSS=BYPASS, we don't currently support SSID when user selects >> iommu.passthrough. > > I don't understand your comment here: iommu.passthrough works just as it did > before, right, since we set bypass in the STE config field so S1DSS is not > relevant? Yes the comment is wrong, or at least unclear. It isn't well defined how SSID is supposed to work with iommu.passthrough, but I guess keeping the same behavior as non-PASID DMA is what we want (any PASID-tagged DMA also bypasses the SMMU.) In the comment I was referring to another possibility, supporting SVA and auxiliary domains even when iommu.passthrough is set. That would require allocating context tables and setting S1DSS=BYPASS. But I don't think it's a feature anyone needs at the moment. > I also notice that SSID0 causes transactions with SSID==0 to > abort. Is a PASID of 0 reserved, so this doesn't matter? Yes, PASID 0 is reserved, we start allocation at 1 > >> @@ -1062,33 +1143,90 @@ static u64 arm_smmu_cpu_tcr_to_cd(u64 tcr) >> return val; >> } >> >> -static void arm_smmu_write_ctx_desc(struct arm_smmu_device *smmu, >> - struct arm_smmu_s1_cfg *cfg) >> +static int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, >> + int ssid, struct arm_smmu_ctx_desc *cd) >> { >> u64 val; >> + bool cd_live; >> + struct arm_smmu_device *smmu = smmu_domain->smmu; >> + __le64 *cdptr = arm_smmu_get_cd_ptr(&smmu_domain->s1_cfg, ssid); >> >> /* >> - * We don't need to issue any invalidation here, as we'll invalidate >> - * the STE when installing the new entry anyway. >> + * This function handles the following cases: >> + * >> + * (1) Install primary CD, for normal DMA traffic (SSID = 0). >> + * (2) Install a secondary CD, for SID+SSID traffic. >> + * (3) Update ASID of a CD. Atomically write the first 64 bits of the >> + * CD, then invalidate the old entry and mappings. >> + * (4) Remove a secondary CD. >> */ >> - val = arm_smmu_cpu_tcr_to_cd(cfg->cd.tcr) | >> + >> + if (!cdptr) >> + return -ENOMEM; >> + >> + val = le64_to_cpu(cdptr[0]); >> + cd_live = !!(val & CTXDESC_CD_0_V); >> + >> + if (!cd) { /* (4) */ >> + cdptr[0] = 0; > > Should we be using WRITE_ONCE here? (although I notice we don't seem to > bother for STEs either...) Sure, that's safer Thanks, Jean _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply index Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-06-10 18:47 [PATCH 0/8] iommu: Add auxiliary domain and PASID support to Arm SMMUv3 Jean-Philippe Brucker 2019-06-10 18:47 ` [PATCH 1/8] iommu: Add I/O ASID allocator Jean-Philippe Brucker 2019-06-11 9:36 ` Jonathan Cameron 2019-06-11 14:35 ` Jean-Philippe Brucker 2019-06-11 18:13 ` Jacob Pan 2019-06-18 14:22 ` Jean-Philippe Brucker 2019-06-18 17:05 ` Jacob Pan 2019-06-19 14:26 ` Jean-Philippe Brucker 2019-06-11 12:26 ` Jacob Pan 2019-06-11 14:37 ` Jean-Philippe Brucker 2019-06-11 17:10 ` Jacob Pan 2019-06-12 11:30 ` Jean-Philippe Brucker 2019-06-10 18:47 ` [PATCH 2/8] dt-bindings: document PASID property for IOMMU masters Jean-Philippe Brucker 2019-07-08 7:58 ` Auger Eric 2019-06-10 18:47 ` [PATCH 3/8] iommu/arm-smmu-v3: Support platform SSID Jean-Philippe Brucker 2019-06-11 9:42 ` Jonathan Cameron 2019-06-11 14:35 ` Jean-Philippe Brucker 2019-06-18 18:08 ` Will Deacon 2019-06-19 11:53 ` Jean-Philippe Brucker 2019-07-08 7:58 ` Auger Eric 2019-09-19 14:51 ` Jean-Philippe Brucker 2019-06-10 18:47 ` [PATCH 4/8] iommu/arm-smmu-v3: Add support for Substream IDs Jean-Philippe Brucker 2019-06-11 10:19 ` Jonathan Cameron 2019-06-11 14:35 ` Jean-Philippe Brucker 2019-06-26 18:00 ` Will Deacon 2019-07-04 9:33 ` Jean-Philippe Brucker [this message] 2019-09-19 14:57 ` Jean-Philippe Brucker 2019-07-08 15:31 ` Auger Eric 2019-09-19 15:01 ` Jean-Philippe Brucker 2019-06-10 18:47 ` [PATCH 5/8] iommu/arm-smmu-v3: Add second level of context descriptor table Jean-Philippe Brucker 2019-06-11 10:24 ` Jonathan Cameron 2019-07-08 15:13 ` Auger Eric 2019-06-10 18:47 ` [PATCH 6/8] iommu/arm-smmu-v3: Support auxiliary domains Jean-Philippe Brucker 2019-06-26 17:59 ` Will Deacon 2019-07-05 16:29 ` Jean-Philippe Brucker 2019-09-19 15:06 ` Jean-Philippe Brucker 2019-06-10 18:47 ` [PATCH 7/8] iommu/arm-smmu-v3: Improve add_device() error handling Jean-Philippe Brucker 2019-07-08 7:58 ` Auger Eric 2019-06-10 18:47 ` [PATCH 8/8] iommu/arm-smmu-v3: Add support for PCI PASID Jean-Philippe Brucker 2019-06-11 10:45 ` Jonathan Cameron 2019-06-11 14:35 ` Jean-Philippe Brucker 2019-07-08 7:58 ` Auger Eric 2019-09-19 15:10 ` Jean-Philippe Brucker
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=104a20b7-ebb1-1569-3f6b-94438b9dbf76@arm.com \ --to=jean-philippe.brucker@arm.com \ --cc=devicetree@vger.kernel.org \ --cc=eric.auger@redhat.com \ --cc=iommu@lists.linux-foundation.org \ --cc=jacob.jun.pan@linux.intel.com \ --cc=joro@8bytes.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=mark.rutland@arm.com \ --cc=robh+dt@kernel.org \ --cc=robin.murphy@arm.com \ --cc=will.deacon@arm.com \ --cc=will@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: link
Linux-ARM-Kernel Archive on lore.kernel.org Archives are clonable: git clone --mirror https://lore.kernel.org/linux-arm-kernel/0 linux-arm-kernel/git/0.git git clone --mirror https://lore.kernel.org/linux-arm-kernel/1 linux-arm-kernel/git/1.git # If you have public-inbox 1.1+ installed, you may # initialize and index your mirror using the following commands: public-inbox-init -V2 linux-arm-kernel linux-arm-kernel/ https://lore.kernel.org/linux-arm-kernel \ linux-arm-kernel@lists.infradead.org public-inbox-index linux-arm-kernel Example config snippet for mirrors Newsgroup available over NNTP: nntp://nntp.lore.kernel.org/org.infradead.lists.linux-arm-kernel AGPL code for this site: git clone https://public-inbox.org/public-inbox.git