From: Alexandre Torgue <alexandre.torgue@st.com>
To: Marek Vasut <marex@denx.de>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
"linux-stm32@st-md-mailman.stormreply.com"
<linux-stm32@st-md-mailman.stormreply.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Patrick Delaunay <patrick.delaunay@st.com>
Subject: Re: STM32MP1 level triggered interrupts
Date: Wed, 22 Jan 2020 18:19:06 +0100 [thread overview]
Message-ID: <129d04a0-c846-506d-5726-4a1024d977a6@st.com> (raw)
In-Reply-To: <65a1c5b2-c1b9-322f-338c-e6ff6379d8d1@denx.de>
On 1/21/20 6:41 PM, Marek Vasut wrote:
> On 1/21/20 6:12 PM, Alexandre Torgue wrote:
>> Hi Marek,
>
> Hi,
>
>> On 1/20/20 7:32 PM, Marek Vasut wrote:
>>> Hi,
>>>
>>> I have a device connected to STM32MP157C which requires active-low
>>> level-triggered interrupt sink. The device interrupt line is connected
>>> to the SoC gpio-C bank, which has it's interrupt line routed into EXTI,
>>> which can only handle edge triggered interrupts to my understanding.
>>
>> correct.
>
> OK
>
>>> However, ARM GIC should be able to do both and EXTI has this irqmux /
>>> EXTImux functionality, which -- if my understanding is correct -- is
>>> capable of routing a select GPIO line directly into the GIC as an EXTIn
>>> interrupt signal. Thus, this might permit handling active low
>>> level-triggered interrupts. Is there some DT binding to configure this
>>> yet ?
>>>
>>> Or is there some other, better, way ?
>>>
>>
>> For SPIs, GIC controller handles rising edge triggered interrupt and
>> active high level-sensitive. GIC integration in STM32MP157c makes that
>> only active high level-sensitive configuration for SPI interrupts is
>> supported.
>
> So technically , there is a possibility to handle level-sensitive
> active-high interrupts. Can one such interrupt be routed through the
> EXTImux into a GIC SPI then ?
Not for external signals. Externals signals are routed to the EXTI
block. Allowed configurations are: rising/falling/both. Following a
rising or falling edge, EXTI will trig a other signal mapped to the GIC.
This GIC interrupt is configured as high level sensitive (and remains
high until EXTI edge pending register is read).
>
>> Concerning, your question:
>>
>> Setting your gpioC interruption as "falling edge" should be enough. On
>> gpioCx falling edge, a high-level signal is generated by exti and sent
>> to GIC (which triggers GIC interrupt). This signal remains high until
>> stm32_irq_ack is called.
>>
>> So you only need: (ex for gpioc 1).
>>
>> interrupt-parent = <&gpioc>;
>> interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
>
> How does this deal with the case where the device holds the interrupt
> line low (since it's level-sensitive, active low) after the driver
> interrupt handler finishes ? Does such condition generate another
> interrupt and call the driver interrupt handler again ? I would expect
> the answer is no, because the interrupt is edge-triggered and there is
> no edge.
Your assumption is good. If your device continue to hold the line to low
at the end of your interrupt handler, no more interrupt will be generated.
>
>> regards
>> Alex
>
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next prev parent reply other threads:[~2020-01-22 17:19 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-20 18:32 STM32MP1 level triggered interrupts Marek Vasut
2020-01-21 17:12 ` Alexandre Torgue
2020-01-21 17:21 ` Marc Zyngier
2020-01-22 16:56 ` Alexandre Torgue
2020-01-21 17:41 ` Marek Vasut
2020-01-22 17:19 ` Alexandre Torgue [this message]
2020-01-22 19:29 ` Marek Vasut
2020-01-23 8:27 ` Alexandre Torgue
2020-01-23 9:22 ` Marc Zyngier
2020-01-23 10:12 ` Uwe Kleine-König
2020-01-23 10:44 ` Marc Zyngier
2020-01-23 10:52 ` Uwe Kleine-König
2020-01-23 11:18 ` Marc Zyngier
2020-01-23 22:21 ` Marek Vasut
2020-01-24 9:17 ` Alexandre Torgue
2020-01-24 9:24 ` Marc Zyngier
2020-01-28 18:32 ` Marek Vasut
2020-02-05 10:26 ` Marek Vasut
2020-02-05 11:42 ` Marc Zyngier
2020-02-05 11:53 ` Marek Vasut
2020-02-05 12:32 ` Marc Zyngier
2020-02-05 15:36 ` Alexandre TORGUE
2020-02-06 2:00 ` Marek Vasut
2020-01-24 12:25 ` Marek Vasut
2020-01-24 9:21 ` Marc Zyngier
2020-01-24 9:35 ` Alexandre Torgue
2020-01-23 22:21 ` Marek Vasut
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