From: ttynkkynen@nvidia.com (Tuomas Tynkkynen)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 15/16] ARM: tegra: Add entries for cpufreq on Tegra124
Date: Mon, 21 Jul 2014 18:39:01 +0300 [thread overview]
Message-ID: <1405957142-19416-16-git-send-email-ttynkkynen@nvidia.com> (raw)
In-Reply-To: <1405957142-19416-1-git-send-email-ttynkkynen@nvidia.com>
The Tegra124 cpufreq driver relies on certain clocks being present
in the /cpus/cpu at 0 node.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
---
v2 changes:
- The clock-latency property was added, as cpufreq-cpu0 wants that
arch/arm/boot/dts/tegra124.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 8ff4332..db51438 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -786,6 +786,15 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0>;
+
+ clocks = <&tegra_car TEGRA124_CLK_CCLK_G>,
+ <&tegra_car TEGRA124_CLK_CCLK_LP>,
+ <&tegra_car TEGRA124_CLK_PLL_X>,
+ <&tegra_car TEGRA124_CLK_PLL_P>,
+ <&dfll>;
+ clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll";
+ /* FIXME: what's the actual transition time? */
+ clock-latency = <300000>;
};
cpu at 1 {
--
1.8.1.5
next prev parent reply other threads:[~2014-07-21 15:39 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-21 15:38 [PATCH v2 00/16] Tegra124 CL-DVFS / DFLL clocksource, plus cpufreq Tuomas Tynkkynen
2014-07-21 15:38 ` [PATCH v2 01/16] regmap: Add regmap_get_device Tuomas Tynkkynen
2014-07-25 17:34 ` Mark Brown
2014-07-25 17:43 ` Mark Brown
2014-07-21 15:38 ` [PATCH v2 02/16] regulator: Add helpers for low-level register access Tuomas Tynkkynen
2014-07-25 17:48 ` Mark Brown
2014-07-21 15:38 ` [PATCH v2 03/16] clk: tegra: Add binding for the Tegra124 DFLL clocksource Tuomas Tynkkynen
2014-07-21 15:38 ` [PATCH v2 04/16] clk: tegra: Add library for the DFLL clock source (open-loop mode) Tuomas Tynkkynen
2014-08-18 6:05 ` Vince Hsu
2014-07-21 15:38 ` [PATCH v2 05/16] clk: tegra: Add closed loop support for the DFLL Tuomas Tynkkynen
2014-08-18 6:08 ` Vince Hsu
2014-07-21 15:38 ` [PATCH v2 06/16] clk: tegra: Add functions for parsing CVB tables Tuomas Tynkkynen
2014-07-21 15:38 ` [PATCH v2 07/16] clk: tegra: Add DFLL DVCO reset control for Tegra124 Tuomas Tynkkynen
2014-07-21 15:38 ` [PATCH v2 08/16] clk: tegra: Add Tegra124 DFLL clocksource platform driver Tuomas Tynkkynen
2014-08-12 10:37 ` Vince Hsu
2014-07-21 15:38 ` [PATCH v2 09/16] clk: tegra: Save/restore CCLKG_BURST_POLICY on suspend Tuomas Tynkkynen
2014-07-21 15:38 ` [PATCH v2 10/16] clk: tegra: Add the DFLL as a possible parent of the cclk_g clock Tuomas Tynkkynen
2014-07-21 15:38 ` [PATCH v2 11/16] ARM: tegra: Add the DFLL to Tegra124 device tree Tuomas Tynkkynen
2014-07-21 15:38 ` [PATCH v2 12/16] ARM: tegra: Enable the DFLL on the Jetson TK1 Tuomas Tynkkynen
2014-07-21 15:38 ` [PATCH v2 13/16] cpufreq: tegra124: Add device tree bindings Tuomas Tynkkynen
2014-07-21 15:39 ` [PATCH v2 14/16] cpufreq: Add cpufreq driver for Tegra124 Tuomas Tynkkynen
2014-07-22 0:49 ` Rafael J. Wysocki
2014-07-23 4:44 ` Viresh Kumar
2014-07-23 6:54 ` Thierry Reding
2014-07-23 6:58 ` Viresh Kumar
2014-07-23 7:24 ` Thierry Reding
2014-07-23 8:25 ` Viresh Kumar
2014-07-23 13:51 ` Thierry Reding
2014-07-23 11:57 ` Tuomas Tynkkynen
2014-07-23 16:50 ` Viresh Kumar
2014-07-23 19:17 ` Tuomas Tynkkynen
2014-07-24 0:13 ` Viresh Kumar
2014-07-24 9:10 ` Thierry Reding
2014-07-23 7:09 ` Thierry Reding
2014-07-23 12:35 ` Tuomas Tynkkynen
2014-07-23 13:59 ` Thierry Reding
2014-07-23 7:21 ` pramod gurav
2014-07-21 15:39 ` Tuomas Tynkkynen [this message]
2014-07-21 15:39 ` [PATCH v2 16/16] ARM: tegra: Update defconfig for tegra124-cpufreq Tuomas Tynkkynen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1405957142-19416-16-git-send-email-ttynkkynen@nvidia.com \
--to=ttynkkynen@nvidia.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).