From mboxrd@z Thu Jan 1 00:00:00 1970 From: ykk@rock-chips.com (Yakir Yang) Date: Tue, 22 Sep 2015 16:00:09 +0800 Subject: [PATCH v5 14/17] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 In-Reply-To: <1442906428-2609-1-git-send-email-ykk@rock-chips.com> References: <1442906428-2609-1-git-send-email-ykk@rock-chips.com> Message-ID: <1442908809-7343-1-git-send-email-ykk@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org There are some IP limit on rk3288 that only support 4 physical lanes of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag. Signed-off-by: Yakir Yang --- Changes in v5: None Changes in v4: - Seprate the link-rate and lane-count limit out with the device_type flag. (Thierry) Changes in v3: None Changes in v2: None drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 35 ++++++++++++++-------- drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 4 +-- 2 files changed, 24 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c index 6be139b..3efae33 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -890,8 +890,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp) return; } - ret = analogix_dp_set_link_train(dp, dp->video_info.lane_count, - dp->video_info.link_rate); + ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count, + dp->video_info.max_link_rate); if (ret) { dev_err(dp->dev, "unable to do link train\n"); return; @@ -1153,18 +1153,27 @@ static int analogix_dp_create_bridge(struct drm_device *drm_dev, static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp) { struct device_node *dp_node = dp->dev->of_node; - struct video_info *video_info = &dp->video_info + struct video_info *video_info = &dp->video_info; - if (of_property_read_u32(dp_node, "samsung,link-rate", - &video_info->link_rate)) { - dev_err(dev, "failed to get link-rate\n"); - return -EINVAL; - } - - if (of_property_read_u32(dp_node, "samsung,lane-count", - &video_info->lane_count)) { - dev_err(dev, "failed to get lane-count\n"); - return -EINVAL; + switch (dp->plat_data && dp->plat_data->dev_type) { + case RK3288_DP: + /* + * Like Rk3288 DisplayPort TRM indicate that "Main link + * containing 4 physical lanes of 2.7/1.62 Gbps/lane". + */ + video_info->max_link_rate = 0x0A; + video_info->max_lane_count = 0x04; + break; + case EXYNOS_DP: + /* + * NOTE: those property parseing code is used for + * providing backward compatibility for samsung platform. + */ + of_property_read_u32(dp_node, "samsung,link-rate", + &video_info->max_link_rate); + of_property_read_u32(dp_node, "samsung,lane-count", + &video_info->max_lane_count); + break; } return 0; diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h index 730486d..f4cb799 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h @@ -129,8 +129,8 @@ struct video_info { enum color_coefficient ycbcr_coeff; enum color_depth color_depth; - enum link_rate_type link_rate; - enum link_lane_count_type lane_count; + enum link_rate_type max_link_rate; + enum link_lane_count_type max_lane_count; }; struct link_train { -- 1.9.1