From: mirza.krak@gmail.com (Mirza Krak)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC 3/6] dt/bindings: Add bindings for Tegra20/30 NOR bus driver
Date: Tue, 19 Jul 2016 15:36:34 +0200 [thread overview]
Message-ID: <1468935397-11926-4-git-send-email-mirza.krak@gmail.com> (raw)
In-Reply-To: <1468935397-11926-1-git-send-email-mirza.krak@gmail.com>
From: Mirza Krak <mirza.krak@gmail.com>
Document the devicetree bindings for NOR bus driver found on Tegra20 and
Tegra30 SOCs
Signed-off-by: Mirza Krak <mirza.krak@gmail.com>
---
.../devicetree/bindings/bus/nvidia,tegra20-nor.txt | 73 ++++++++++++++++++++++
1 file changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/bus/nvidia,tegra20-nor.txt
diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra20-nor.txt b/Documentation/devicetree/bindings/bus/nvidia,tegra20-nor.txt
new file mode 100644
index 0000000..9ee4a66
--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/nvidia,tegra20-nor.txt
@@ -0,0 +1,73 @@
+Device tree bindings for NVIDIA Tegra20/30 NOR Bus
+
+The NOR controller supports a number of memory types, including synchronous NOR,
+asynchronous NOR, and other flash memories with similar interfaces, such as
+MuxOneNAND. One could also connect high speed devices like FPGAs, DSPs,
+CAN chips, Wi-Fi chips etc.
+
+The actual devices are instantiated from the child nodes of a NOR node.
+
+Required properties:
+
+ - compatible: should be "nvidia,tegra20-nor", "nvidia,tegra30-nor"
+ - reg: Should contain NOR controller registers location and length.
+ - clocks: Must contain one entry, for the module clock.
+ See ../clocks/clock-bindings.txt for details.
+ - resets : Must contain an entry for each entry in reset-names.
+ See ../reset/reset.txt for details.
+ - reset-names : Must include the following entries:
+ - nor
+ - #address-cells: Must be set to 2 to allow memory address translation
+ - #size-cells: Must be set to 1 to allow CS address passing
+ - ranges: Must be set up to reflect the memory layout with four integer
+ values for each chip-select line in use.
+ - nvidia,config: This property represents the SNOR_CONFIG_0 register.
+
+Note that the NOR controller does not have any internal chip-select address
+decoding and if you want to access multiple devices external chip-select
+decoding must be provided.
+
+Optional properties:
+
+ - nvidia,cs-timing: The timing array represents the SNOR_TIMING0_0 and
+ SNOR_TIMING1_0 registers for the NOR controller. If unset reset-values will
+ be used. See reference documentation for detailed description of the timing
+ registers.
+
+Example with two SJA1000 CAN controllers connected to the NOR bus:
+
+ nor at 70009000 {
+ status = "okay";
+ compatible = "nvidia,tegra20-nor", "nvidia,tegra30-nor";
+ reg = <0x70009000 0x1000>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ clocks = <&tegra_car TEGRA30_CLK_NOR>;
+ resets = < &tegra_car 42>;
+ reset-names = "nor";
+ ranges = <
+ 0 0 0x48000000 0x00000100
+ 1 0 0x48040000 0x00000100
+ >;
+
+ can at 0,0 {
+ compatible = "nxp,sja1000";
+ reg = <0 0 0x100>;
+ interrupt-parent = <&gpio>;
+ interrupts = <TEGRA_GPIO(B, 5) IRQ_TYPE_EDGE_RISING>;
+ nxp,external-clock-frequency = <24000000>;
+ nxp,tx-output-config = <0x16>;
+ nxp,clock-out-frequency = <24000000>;
+ reg-io-width = <2>;
+ };
+
+
+ can at 1,0 {
+ compatible = "nxp,sja1000";
+ reg = <1 0 0x100>;
+ interrupt-parent = <&gpio>;
+ interrupts = <TEGRA_GPIO(A, 6) IRQ_TYPE_EDGE_RISING>;
+ nxp,external-clock-frequency = <24000000>;
+ nxp,tx-output-config = <0x16>;
+ reg-io-width = <2>;
+ };
--
2.1.4
next prev parent reply other threads:[~2016-07-19 13:36 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-19 13:36 [RFC 0/6] Add support for Tegra20/30 NOR bus controller Mirza Krak
2016-07-19 13:36 ` [RFC 1/6] clk: tegra: add TEGRA20_CLK_NOR to init table Mirza Krak
2016-07-25 11:17 ` Thierry Reding
2016-07-25 12:28 ` Mirza Krak
2016-07-25 13:23 ` Thierry Reding
2016-07-19 13:36 ` [RFC 2/6] clk: tegra: add TEGRA30_CLK_NOR " Mirza Krak
2016-07-19 13:36 ` Mirza Krak [this message]
2016-07-20 12:44 ` [RFC 3/6] dt/bindings: Add bindings for Tegra20/30 NOR bus driver Rob Herring
2016-07-20 19:28 ` Mirza Krak
2016-07-21 10:26 ` Jon Hunter
2016-07-25 11:36 ` Thierry Reding
2016-07-25 13:20 ` Mirza Krak
2016-07-25 13:27 ` Thierry Reding
2016-07-25 13:33 ` Mirza Krak
2016-07-21 9:56 ` Jon Hunter
2016-07-21 20:10 ` Mirza Krak
2016-07-22 9:32 ` Jon Hunter
2016-07-22 19:07 ` Mirza Krak
2016-07-25 8:14 ` Jon Hunter
2016-07-25 12:10 ` Thierry Reding
2016-07-25 13:09 ` Jon Hunter
2016-07-25 13:32 ` Thierry Reding
2016-07-25 11:59 ` Thierry Reding
2016-07-25 13:30 ` Mirza Krak
2016-07-25 13:39 ` Thierry Reding
2016-07-25 13:50 ` Mirza Krak
2016-07-25 13:36 ` Jon Hunter
2016-07-25 13:49 ` Thierry Reding
2016-07-25 11:30 ` Thierry Reding
2016-07-25 13:16 ` Mirza Krak
2016-07-25 14:15 ` Thierry Reding
2016-07-25 14:38 ` Mirza Krak
2016-07-25 15:01 ` Jon Hunter
2016-07-25 15:34 ` Thierry Reding
2016-07-25 19:59 ` Mirza Krak
2016-07-26 8:32 ` Thierry Reding
2016-07-28 9:29 ` Mirza Krak
2016-07-19 13:36 ` [RFC 4/6] ARM: tegra: Add Tegra30 NOR support Mirza Krak
2016-07-19 13:36 ` [RFC 5/6] ARM: tegra: Add Tegra20 " Mirza Krak
2016-07-19 13:36 ` [RFC 6/6] bus: Add support for Tegra NOR controller Mirza Krak
2016-07-21 10:15 ` Jon Hunter
2016-07-21 20:42 ` Mirza Krak
2016-07-22 9:38 ` Jon Hunter
2016-07-22 19:18 ` Mirza Krak
2016-07-25 8:19 ` Jon Hunter
2016-07-25 10:57 ` Thierry Reding
2016-07-21 15:12 ` Jon Hunter
2016-07-21 21:41 ` Mirza Krak
2016-07-25 11:14 ` Thierry Reding
2016-07-25 12:17 ` Mirza Krak
2016-07-25 13:41 ` Thierry Reding
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1468935397-11926-4-git-send-email-mirza.krak@gmail.com \
--to=mirza.krak@gmail.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).