From: yt.shen@mediatek.com (YT Shen)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 9/9] drm/mediatek: add support for Mediatek SoC MT2701
Date: Mon, 12 Sep 2016 18:16:53 +0800 [thread overview]
Message-ID: <1473675413.12398.29.camel@mtksdaap41> (raw)
In-Reply-To: <1473226653.11736.33.camel@mtksdaap41>
Hi CK,
On Wed, 2016-09-07 at 13:37 +0800, CK Hu wrote:
> Hi, YT:
>
> On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote:
> > This patch add support for the Mediatek MT2701 DISP subsystem.
> > There is only one OVL engine in MT2701.
> >
> > Signed-off-by: YT Shen <yt.shen@mediatek.com>
>
> [snip...]
>
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> > index 4b4e449..465819b 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> > @@ -112,6 +112,7 @@ struct mtk_ddp_comp_match {
> >
> > static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
> > [DDP_COMPONENT_AAL] = { MTK_DISP_AAL, 0, NULL },
> > + [DDP_COMPONENT_BLS] = { MTK_DISP_PWM, 0, NULL },
>
> I think BLS is different than PWM, so this statement should be
>
> [DDP_COMPONENT_BLS] = { MTK_DISP_BLS, 0, NULL };
The BLS module actually is a multifunction device, one of them is the
PWM function. We only upstream PWM function [1] now, and it is
accepted. When there are real use case (gamma function), we will update
this part. What do you think?
Regards,
yt.shen
[1] https://patchwork.kernel.org/patch/9223001/
>
>
> > [DDP_COMPONENT_COLOR0] = { MTK_DISP_COLOR, 0, &ddp_color },
> > [DDP_COMPONENT_COLOR1] = { MTK_DISP_COLOR, 1, &ddp_color },
> > [DDP_COMPONENT_DPI0] = { MTK_DPI, 0, NULL },
>
> Regards,
> CK
>
>
next prev parent reply other threads:[~2016-09-12 10:16 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-02 11:24 [PATCH v7 0/9] MT2701 DRM support YT Shen
2016-09-02 11:24 ` [PATCH v7 1/9] drm/mediatek: rename macros, add chip prefix YT Shen
2016-09-02 11:24 ` [PATCH v7 2/9] drm/mediatek: add *driver_data for different hardware settings YT Shen
2016-09-06 7:26 ` CK Hu
2016-09-02 11:24 ` [PATCH v7 3/9] drm/mediatek: add shadow register support YT Shen
2016-09-02 11:24 ` [PATCH v7 4/9] drm/mediatek: update display module connections YT Shen
2016-09-06 7:39 ` CK Hu
2016-09-12 10:16 ` YT Shen
2016-09-02 11:24 ` [PATCH v7 5/9] drm/mediatek: cleaning up and refine YT Shen
2016-09-02 11:24 ` [PATCH v7 6/9] drm/mediatek: add dsi interrupt control YT Shen
2016-09-07 1:39 ` CK Hu
2016-09-12 10:16 ` YT Shen
2016-09-02 11:24 ` [PATCH v7 7/9] drm/mediatek: add dsi transfer function YT Shen
2016-09-07 2:33 ` CK Hu
2016-09-12 10:16 ` YT Shen
2016-09-13 9:25 ` CK Hu
2016-09-14 6:19 ` YT Shen
2016-09-14 6:39 ` CK Hu
2016-09-14 7:22 ` YT Shen
2016-09-14 7:34 ` CK Hu
2016-09-02 11:24 ` [PATCH v7 8/9] drm/mediatek: update DSI sub driver flow YT Shen
2016-09-07 4:58 ` CK Hu
2016-09-12 10:15 ` YT Shen
2016-09-13 9:59 ` CK Hu
2016-09-02 11:24 ` [PATCH v7 9/9] drm/mediatek: add support for Mediatek SoC MT2701 YT Shen
2016-09-07 5:37 ` CK Hu
2016-09-12 10:16 ` YT Shen [this message]
2016-09-13 5:32 ` CK Hu
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