From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 02/10] arm64: cpufeature: Don't enforce system-wide SPE capability
Date: Fri, 27 Jan 2017 18:07:41 +0000 [thread overview]
Message-ID: <1485540470-11469-3-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1485540470-11469-1-git-send-email-will.deacon@arm.com>
The statistical profiling extension (SPE) is an optional feature of
ARMv8.1 and is unlikely to be supported by all of the CPUs in a
heterogeneous system.
This patch updates the cpufeature checks so that such systems are not
tainted as unsupported.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Suzuki Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
arch/arm64/include/asm/sysreg.h | 1 +
arch/arm64/kernel/cpufeature.c | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 98ae03f8eedd..e156e7793a65 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -190,6 +190,7 @@
#define ID_AA64MMFR2_CNP_SHIFT 0
/* id_aa64dfr0 */
+#define ID_AA64DFR0_PMSVER_SHIFT 32
#define ID_AA64DFR0_CTX_CMPS_SHIFT 28
#define ID_AA64DFR0_WRPS_SHIFT 20
#define ID_AA64DFR0_BRPS_SHIFT 12
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 47d0226620e8..c18eb78d3a00 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -180,7 +180,8 @@ static const struct arm64_ftr_bits ftr_id_mmfr0[] = {
};
static const struct arm64_ftr_bits ftr_id_aa64dfr0[] = {
- ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 32, 32, 0),
+ ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 36, 28, 0),
+ ARM64_FTR_BITS(FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64DFR0_PMSVER_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_CTX_CMPS_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_WRPS_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_BRPS_SHIFT, 4, 0),
--
2.1.4
next prev parent reply other threads:[~2017-01-27 18:07 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-27 18:07 [PATCH 00/10] Add support for the ARMv8.2 Statistical Profiling Extension Will Deacon
2017-01-27 18:07 ` [PATCH 01/10] arm64: cpufeature: allow for version discrepancy in PMU implementations Will Deacon
2017-01-27 18:07 ` Will Deacon [this message]
2017-01-27 18:07 ` [PATCH 03/10] arm64: KVM: Save/restore the host SPE state when entering/leaving a VM Will Deacon
2017-02-01 16:29 ` Marc Zyngier
2017-02-02 18:18 ` Will Deacon
2017-02-02 18:21 ` Marc Zyngier
2017-01-27 18:07 ` [PATCH 04/10] arm64: head.S: Enable EL1 (host) access to SPE when entered at EL2 Will Deacon
2017-02-01 16:22 ` Marc Zyngier
2017-02-09 18:26 ` Mark Rutland
2017-01-27 18:07 ` [PATCH 05/10] genirq: export irq_get_percpu_devid_partition to modules Will Deacon
2017-01-27 18:07 ` [PATCH 06/10] perf/core: Export AUX buffer helpers " Will Deacon
2017-01-27 18:07 ` [PATCH 07/10] perf: Directly pass PERF_AUX_* flags to perf_aux_output_end Will Deacon
2017-02-17 13:40 ` Alexander Shishkin
2017-02-17 14:00 ` Will Deacon
2017-02-17 14:06 ` Alexander Shishkin
2017-02-17 14:42 ` Will Deacon
2017-02-17 14:59 ` Alexander Shishkin
2017-01-27 18:07 ` [PATCH 08/10] perf/core: Add PERF_AUX_FLAG_COLLISION to report colliding samples Will Deacon
2017-03-31 16:44 ` Robin Murphy
2017-01-27 18:07 ` [PATCH 09/10] drivers/perf: Add support for ARMv8.2 Statistical Profiling Extension Will Deacon
2017-01-30 19:03 ` Kim Phillips
2017-01-27 18:07 ` [PATCH 10/10] dt-bindings: Document devicetree binding for ARM SPE Will Deacon
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