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From: aisheng.dong@nxp.com (Dong Aisheng)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2 1/5] pinctrl: imx: fix debug message for SHARE_MUX_CONF_REG case
Date: Fri, 19 May 2017 15:05:41 +0800	[thread overview]
Message-ID: <1495177545-23006-2-git-send-email-aisheng.dong@nxp.com> (raw)
In-Reply-To: <1495177545-23006-1-git-send-email-aisheng.dong@nxp.com>

The original implemented debug message does not work for
SHARE_MUX_CONF_REG case. This patch fixes it.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Fixes: bf5a530971af ("pinctrl: imx: add VF610 support to imx pinctrl framework")
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>

---
 * no changes
---
 drivers/pinctrl/freescale/pinctrl-imx.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
index a7ace9e..6882644 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx.c
@@ -199,11 +199,13 @@ static int imx_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
 			reg &= ~(0x7 << 20);
 			reg |= (pin->mux_mode << 20);
 			writel(reg, ipctl->base + pin_reg->mux_reg);
+			dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
+				pin_reg->mux_reg, reg);
 		} else {
 			writel(pin->mux_mode, ipctl->base + pin_reg->mux_reg);
+			dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
+				pin_reg->mux_reg, pin->mux_mode);
 		}
-		dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
-			pin_reg->mux_reg, pin->mux_mode);
 
 		/*
 		 * If the select input value begins with 0xff, it's a quirky
@@ -405,11 +407,13 @@ static int imx_pinconf_set(struct pinctrl_dev *pctldev,
 			reg &= ~0xffff;
 			reg |= configs[i];
 			writel(reg, ipctl->base + pin_reg->conf_reg);
+			dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
+				pin_reg->conf_reg, reg);
 		} else {
 			writel(configs[i], ipctl->base + pin_reg->conf_reg);
+			dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%lx\n",
+				pin_reg->conf_reg, configs[i]);
 		}
-		dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%lx\n",
-			pin_reg->conf_reg, configs[i]);
 	} /* for each config */
 
 	return 0;
-- 
2.7.4

  reply	other threads:[~2017-05-19  7:05 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-19  7:05 [PATCH V2 0/5] pinctrl: imx: add generic pin config and imx7ulp support Dong Aisheng
2017-05-19  7:05 ` Dong Aisheng [this message]
2017-05-21  9:27   ` [PATCH V2 1/5] pinctrl: imx: fix debug message for SHARE_MUX_CONF_REG case Shawn Guo
2017-05-22  9:02   ` Linus Walleij
2017-05-19  7:05 ` [PATCH V2 2/5] pinctrl: imx: add generic pin config core support Dong Aisheng
2017-05-21  9:27   ` Shawn Guo
2017-05-22  9:04   ` Linus Walleij
2017-05-19  7:05 ` [PATCH V2 3/5] pinctrl: imx: add soc specific mux_mode mask and shift property Dong Aisheng
2017-05-21  9:28   ` Shawn Guo
2017-05-22  9:06   ` Linus Walleij
2017-05-19  7:05 ` [PATCH V2 4/5] dt-bindings: pinctrl: add imx7ulp pinctrl binding doc Dong Aisheng
2017-05-21  9:30   ` Shawn Guo
2017-05-21  9:40     ` A.S. Dong
2017-05-21 11:00       ` Shawn Guo
2017-05-22  9:27   ` Linus Walleij
2017-05-22 12:30     ` A.S. Dong
2017-05-22 16:15   ` Stefan Agner
2017-05-23 10:37     ` A.S. Dong
2017-05-25  3:16       ` Shawn Guo
2017-05-25  5:04         ` A.S. Dong
2017-05-25  6:23           ` Shawn Guo
2017-05-25  6:48             ` Stefan Agner
2017-05-19  7:05 ` [PATCH V2 5/5] pinctrl: imx: add imx7ulp driver Dong Aisheng
2017-05-21  9:31   ` Shawn Guo
2017-05-23  7:41 ` [PATCH V2 0/5] pinctrl: imx: add generic pin config and imx7ulp support Linus Walleij
2017-05-23  9:17   ` A.S. Dong

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