From: Julien Thierry <julien.thierry@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: mark.rutland@arm.com, daniel.thompson@linaro.org,
Julien Thierry <julien.thierry@arm.com>,
marc.zyngier@arm.com, catalin.marinas@arm.com,
will.deacon@arm.com, linux-kernel@vger.kernel.org,
christoffer.dall@arm.com, james.morse@arm.com,
joel@joelfernandes.org, Russell King <linux@armlinux.org.uk>
Subject: [PATCH v8 05/26] arm/arm64: gic-v3: Add PMR and RPR accessors
Date: Tue, 8 Jan 2019 14:07:23 +0000 [thread overview]
Message-ID: <1546956464-48825-6-git-send-email-julien.thierry@arm.com> (raw)
In-Reply-To: <1546956464-48825-1-git-send-email-julien.thierry@arm.com>
Add helper functions to access system registers related to interrupt
priorities: PMR and RPR.
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/include/asm/arch_gicv3.h | 16 ++++++++++++++++
arch/arm64/include/asm/arch_gicv3.h | 15 +++++++++++++++
2 files changed, 31 insertions(+)
diff --git a/arch/arm/include/asm/arch_gicv3.h b/arch/arm/include/asm/arch_gicv3.h
index 0bd5307..bef0b5d 100644
--- a/arch/arm/include/asm/arch_gicv3.h
+++ b/arch/arm/include/asm/arch_gicv3.h
@@ -34,6 +34,7 @@
#define ICC_SRE __ACCESS_CP15(c12, 0, c12, 5)
#define ICC_IGRPEN1 __ACCESS_CP15(c12, 0, c12, 7)
#define ICC_BPR1 __ACCESS_CP15(c12, 0, c12, 3)
+#define ICC_RPR __ACCESS_CP15(c12, 0, c11, 3)
#define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x)
#define ICC_AP0R0 __ICC_AP0Rx(0)
@@ -245,6 +246,21 @@ static inline void gic_write_bpr1(u32 val)
write_sysreg(val, ICC_BPR1);
}
+static inline u32 gic_read_pmr(void)
+{
+ return read_sysreg(ICC_PMR);
+}
+
+static inline void gic_write_pmr(u32 val)
+{
+ write_sysreg(val, ICC_PMR);
+}
+
+static inline u32 gic_read_rpr(void)
+{
+ return read_sysreg(ICC_RPR);
+}
+
/*
* Even in 32bit systems that use LPAE, there is no guarantee that the I/O
* interface provides true 64bit atomic accesses, so using strd/ldrd doesn't
diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h
index e278f94..37193e2 100644
--- a/arch/arm64/include/asm/arch_gicv3.h
+++ b/arch/arm64/include/asm/arch_gicv3.h
@@ -114,6 +114,21 @@ static inline void gic_write_bpr1(u32 val)
write_sysreg_s(val, SYS_ICC_BPR1_EL1);
}
+static inline u32 gic_read_pmr(void)
+{
+ return read_sysreg_s(SYS_ICC_PMR_EL1);
+}
+
+static inline void gic_write_pmr(u32 val)
+{
+ write_sysreg_s(val, SYS_ICC_PMR_EL1);
+}
+
+static inline u32 gic_read_rpr(void)
+{
+ return read_sysreg_s(SYS_ICC_RPR_EL1);
+}
+
#define gic_read_typer(c) readq_relaxed(c)
#define gic_write_irouter(v, c) writeq_relaxed(v, c)
#define gic_read_lpir(c) readq_relaxed(c)
--
1.9.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-01-08 14:09 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-08 14:07 [PATCH v8 00/26] arm64: provide pseudo NMI with GICv3 Julien Thierry
2019-01-08 14:07 ` [PATCH v8 01/26] arm64: Fix HCR.TGE status for NMI contexts Julien Thierry
2019-01-14 15:56 ` Catalin Marinas
2019-01-14 16:12 ` Julien Thierry
2019-01-14 17:25 ` James Morse
2019-01-16 13:35 ` Sasha Levin
2019-01-28 9:16 ` Marc Zyngier
2019-01-08 14:07 ` [PATCH v8 02/26] arm64: Remove unused daif related functions/macros Julien Thierry
2019-01-08 14:07 ` [PATCH v8 03/26] arm64: cpufeature: Set SYSREG_GIC_CPUIF as a boot system feature Julien Thierry
2019-01-08 14:07 ` [PATCH v8 04/26] arm64: cpufeature: Add cpufeature for IRQ priority masking Julien Thierry
2019-01-08 14:07 ` Julien Thierry [this message]
2019-01-08 14:07 ` [PATCH v8 06/26] irqchip/gic-v3: Switch to PMR masking before calling IRQ handler Julien Thierry
2019-01-08 14:07 ` [PATCH v8 07/26] arm64: ptrace: Provide definitions for PMR values Julien Thierry
2019-01-14 16:12 ` Catalin Marinas
2019-01-08 14:07 ` [PATCH v8 08/26] arm64: Make PMR part of task context Julien Thierry
2019-01-18 16:10 ` Catalin Marinas
2019-01-08 14:07 ` [PATCH v8 09/26] arm64: Unmask PMR before going idle Julien Thierry
2019-01-18 16:23 ` Catalin Marinas
2019-01-18 17:17 ` Julien Thierry
2019-01-08 14:07 ` [PATCH v8 10/26] arm64: kvm: Unmask PMR before entering guest Julien Thierry
2019-01-18 16:25 ` Catalin Marinas
2019-01-08 14:07 ` [PATCH v8 11/26] efi: Let architectures decide the flags that should be saved/restored Julien Thierry
2019-01-18 16:26 ` Catalin Marinas
2019-01-08 14:07 ` [PATCH v8 12/26] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking Julien Thierry
2019-01-08 15:40 ` Dave Martin
2019-01-08 15:51 ` Marc Zyngier
2019-01-08 16:45 ` Dave Martin
2019-01-08 17:16 ` Marc Zyngier
2019-01-08 18:01 ` Dave Martin
2019-01-08 17:58 ` Julien Thierry
2019-01-08 18:37 ` Dave Martin
2019-01-18 16:09 ` Catalin Marinas
2019-01-18 16:57 ` Julien Thierry
2019-01-18 17:30 ` Catalin Marinas
2019-01-18 17:33 ` Catalin Marinas
2019-01-21 8:45 ` Julien Thierry
2019-01-18 16:35 ` Dave Martin
2019-01-18 17:27 ` Julien Thierry
2019-01-18 18:23 ` Dave Martin
2019-01-08 14:07 ` [PATCH v8 13/26] arm64: daifflags: Include PMR in daifflags restore operations Julien Thierry
2019-01-18 16:43 ` Catalin Marinas
2019-01-08 14:07 ` [PATCH v8 14/26] arm64: alternative: Allow alternative status checking per cpufeature Julien Thierry
2019-01-08 14:07 ` [PATCH v8 15/26] arm64: alternative: Apply alternatives early in boot process Julien Thierry
2019-01-08 14:51 ` Suzuki K Poulose
2019-01-08 15:20 ` Julien Thierry
2019-01-08 17:40 ` Suzuki K Poulose
2019-01-10 10:50 ` Julien Thierry
2019-01-08 14:07 ` [PATCH v8 16/26] irqchip/gic-v3: Factor group0 detection into functions Julien Thierry
2019-01-08 14:07 ` [PATCH v8 17/26] arm64: Switch to PMR masking when starting CPUs Julien Thierry
2019-01-08 14:07 ` [PATCH v8 18/26] arm64: gic-v3: Implement arch support for priority masking Julien Thierry
2019-01-08 14:07 ` [PATCH v8 19/26] irqchip/gic-v3: Detect if GIC can support pseudo-NMIs Julien Thierry
2019-01-08 14:07 ` [PATCH v8 20/26] irqchip/gic-v3: Handle pseudo-NMIs Julien Thierry
2019-01-08 14:07 ` [PATCH v8 21/26] irqchip/gic: Add functions to access irq priorities Julien Thierry
2019-01-08 14:07 ` [PATCH v8 22/26] irqchip/gic-v3: Allow interrupts to be set as pseudo-NMI Julien Thierry
2019-01-08 14:07 ` [PATCH v8 23/26] arm64: Handle serror in NMI context Julien Thierry
2019-01-08 14:07 ` [PATCH v8 24/26] arm64: Skip preemption when exiting an NMI Julien Thierry
2019-01-08 14:07 ` [PATCH v8 25/26] arm64: Skip irqflags tracing for NMI in IRQs disabled context Julien Thierry
2019-01-08 14:07 ` [PATCH v8 26/26] arm64: Enable the support of pseudo-NMIs Julien Thierry
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1546956464-48825-6-git-send-email-julien.thierry@arm.com \
--to=julien.thierry@arm.com \
--cc=catalin.marinas@arm.com \
--cc=christoffer.dall@arm.com \
--cc=daniel.thompson@linaro.org \
--cc=james.morse@arm.com \
--cc=joel@joelfernandes.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=marc.zyngier@arm.com \
--cc=mark.rutland@arm.com \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).