From: Lucas Stach <l.stach@pengutronix.de>
To: Andrey Smirnov <andrew.smirnov@gmail.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>, Rob Herring <robh@kernel.org>,
Richard Zhu <hongxing.zhu@nxp.com>,
devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org,
Fabio Estevam <fabio.estevam@nxp.com>,
linux-imx@nxp.com, Bjorn Helgaas <bhelgaas@google.com>,
Leonard Crestez <leonard.crestez@nxp.com>,
Chris Healy <cphealy@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/2] PCI: imx6: Add code to request/control "pcie_aux" clock for i.MX8MQ
Date: Tue, 12 Feb 2019 10:36:06 +0100 [thread overview]
Message-ID: <1549964166.2546.21.camel@pengutronix.de> (raw)
In-Reply-To: <20190212015108.16952-3-andrew.smirnov@gmail.com>
Am Montag, den 11.02.2019, 17:51 -0800 schrieb Andrey Smirnov:
> PCIe IP block has additional clock, "pcie_aux", that needs to be
> controlled by the driver. Add code to support that.
>
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Chris Healy <cphealy@gmail.com>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: Leonard Crestez <leonard.crestez@nxp.com>
> Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Cc: Rob Herring <robh@kernel.org>
> Cc: devicetree@vger.kernel.org
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 7cdf8f9ab244..1a7031782846 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -65,6 +65,7 @@ struct imx6_pcie {
> struct clk *pcie_phy;
> struct clk *pcie_inbound_axi;
> struct clk *pcie;
> + struct clk *pcie_aux;
> struct regmap *iomuxc_gpr;
> u32 controller_id;
> struct reset_control *pciephy_reset;
> @@ -421,6 +422,12 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
> case IMX7D:
> break;
> case IMX8MQ:
> + ret = clk_prepare_enable(imx6_pcie->pcie_aux);
> + if (ret) {
> + dev_err(dev, "unable to enable pcie_aux clock\n");
> + break;
> + }
> +
> offset = imx6_pcie_grp_offset(imx6_pcie);
> /*
> * Set the over ride low and enabled
> @@ -904,6 +911,9 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
> IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
> IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
> break;
> + case IMX8MQ:
> + clk_disable_unprepare(imx6_pcie->pcie_aux);
> + break;
> default:
> break;
> }
> @@ -1049,6 +1059,12 @@ static int imx6_pcie_probe(struct platform_device *pdev)
> dev_err(dev, "Failed to get PCIE APPS reset control\n");
> return PTR_ERR(imx6_pcie->apps_reset);
> }
> +
> + imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux");
> + if (IS_ERR(imx6_pcie->pcie_aux)) {
> + dev_err(dev, "pcie_aux clock source missing or invalid\n");
> + return PTR_ERR(imx6_pcie->pcie_aux);
> + }
> break;
> default:
> break;
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next prev parent reply other threads:[~2019-02-12 9:36 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-12 1:51 [PATCH 0/2] "pcie_aux" clock for i.MX8MQ Andrey Smirnov
2019-02-12 1:51 ` [PATCH 1/2] dt-bindings: imx6q-pcie: Add "pcie_aux" clock for imx8mq Andrey Smirnov
2019-02-12 8:57 ` Lucas Stach
2019-02-25 23:39 ` Rob Herring
2019-02-12 1:51 ` [PATCH 2/2] PCI: imx6: Add code to request/control "pcie_aux" clock for i.MX8MQ Andrey Smirnov
2019-02-12 9:36 ` Lucas Stach [this message]
2019-02-28 21:23 ` Trent Piepho
2019-03-01 1:16 ` Andrey Smirnov
2019-02-19 12:42 ` [PATCH 0/2] " Lorenzo Pieralisi
2019-02-19 12:46 ` Lucas Stach
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