From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F986C43381 for ; Thu, 28 Mar 2019 03:18:42 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2BDEA206C0 for ; Thu, 28 Mar 2019 03:18:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="btEujDhN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2BDEA206C0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9Iss8ch8Yh78psCs+NDd/1Dk07gaopziPhLDTXpJyq0=; b=btEujDhNkeOjYN gA2YqsnbimBpL5qZ0W/X5tb1LTrsE/jLZ+ccF/IAW/XH5FpjoOfZ65V8n8qolyf63lK4GmdK/EbDe WLQKkR8WI3Yufs/g7QjA+Yu4tYKFtX6Yz4EiLsHkUJ39oyUtFchrNMrDXgyUsCmuKf/kaypQBsrvH 9/yfdMGtVYT8vxYRVxE4SzVWv4Za0PXtWTbIBfzEPOfGERiLhDub09k3/yqrNV6J+5Yp3UrwFvO/2 Q3Cke9oad6tIapRcEHSyr9cMzkVPjl5qghE686dXM45m+Uy6Z5o8YSE8O4+szOMEM7MMMjJwHXhty CnvNFOYn+gjPUQvEPvLw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h9LYq-0000ao-OK; Thu, 28 Mar 2019 03:18:36 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h9LYn-0000Zy-BM; Thu, 28 Mar 2019 03:18:34 +0000 X-UUID: 353d5e092fc24a999fda088acbf8e8ea-20190327 X-UUID: 353d5e092fc24a999fda088acbf8e8ea-20190327 Received: from mtkcas67.mediatek.inc [(172.29.193.45)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1377800912; Wed, 27 Mar 2019 19:18:30 -0800 Received: from MTKMBS01DR.mediatek.inc (172.21.101.111) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 27 Mar 2019 20:18:28 -0700 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs01dr.mediatek.inc (172.21.101.111) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 28 Mar 2019 11:18:26 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 28 Mar 2019 11:18:26 +0800 Message-ID: <1553743106.14682.6.camel@mtksdaap41> Subject: Re: [PATCH v2 01/25] arm64: dts: add display nodes for mt8183 From: CK Hu To: Date: Thu, 28 Mar 2019 11:18:26 +0800 In-Reply-To: <1553667561-25447-2-git-send-email-yongqiang.niu@mediatek.com> References: <1553667561-25447-1-git-send-email-yongqiang.niu@mediatek.com> <1553667561-25447-2-git-send-email-yongqiang.niu@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190327_201833_394891_652000D3 X-CRM114-Status: GOOD ( 13.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Bibby.Hsieh@mediatek.com, airlied@linux.ie, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, yt.shen@mediatek.com, robh+dt@kernel.org, linux-mediatek@lists.infradead.org, p.zabel@pengutronix.de, matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Yongqiang: On Wed, 2019-03-27 at 14:18 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu > > This patch add display nodes for mt8183 I think this patch should be after binding document patch. You should define the compatible string then you could add device node. > > Change-Id: I9ce7081a2159ec7cc199999285b0390b01de43fe Remove 'Change-Id' when you upstream. Regards, CK > Signed-off-by: Yongqiang Niu > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 107 +++++++++++++++++++++++++++++++ > 1 file changed, 107 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index 75c4881..f219dbd 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -16,6 +16,14 @@ > #address-cells = <2>; > #size-cells = <2>; > > + aliases { > + ovl0 = &ovl0; > + ovl_2l0 = &ovl0_2l; > + ovl_2l1 = &ovl1_2l; > + rdma0 = &rdma0; > + rdma1 = &rdma1; > + }; > + > cpus { > #address-cells = <1>; > #size-cells = <0>; > @@ -317,6 +325,105 @@ > #clock-cells = <1>; > }; > > + display_components: dispsys@14000000 { > + compatible = "mediatek,mt8183-display"; > + reg = <0 0x14000000 0 0x1000>; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + }; > + > + ovl0: ovl@14008000 { > + compatible = "mediatek,mt8183-disp-ovl"; > + reg = <0 0x14008000 0 0x1000>; > + interrupts = ; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_OVL0>; > + iommus = <&iommu M4U_PORT_DISP_OVL0>; > + mediatek,larb = <&larb0>; > + }; > + > + ovl0_2l: ovl@14009000 { > + compatible = "mediatek,mt8183-disp-ovl-2l"; > + reg = <0 0x14009000 0 0x1000>; > + interrupts = ; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_OVL0_2L>; > + iommus = <&iommu M4U_PORT_DISP_2L_OVL0_LARB0>; > + mediatek,larb = <&larb0>; > + }; > + > + ovl1_2l: ovl@1400a000 { > + compatible = "mediatek,mt8183-disp-ovl-2l"; > + reg = <0 0x1400a000 0 0x1000>; > + interrupts = ; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_OVL1_2L>; > + iommus = <&iommu M4U_PORT_DISP_2L_OVL1_LARB0>; > + mediatek,larb = <&larb0>; > + }; > + > + rdma0: rdma@1400b000 { > + compatible = "mediatek,mt8183-disp-rdma"; > + reg = <0 0x1400b000 0 0x1000>; > + interrupts = ; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_RDMA0>; > + iommus = <&iommu M4U_PORT_DISP_RDMA0>; > + mediatek,larb = <&larb0>; > + }; > + > + rdma1: rdma@1400c000 { > + compatible = "mediatek,mt8183-disp-rdma1"; > + reg = <0 0x1400c000 0 0x1000>; > + interrupts = ; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_RDMA1>; > + iommus = <&iommu M4U_PORT_DISP_RDMA1>; > + mediatek,larb = <&larb0>; > + }; > + > + color0: color@1400e000 { > + compatible = "mediatek,mt8183-disp-color", > + "mediatek,mt8173-disp-color"; > + reg = <0 0x1400e000 0 0x1000>; > + interrupts = ; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_COLOR0>; > + }; > + > + ccorr0: ccorr@1400f000 { > + compatible = "mediatek,mt8183-disp-ccorr"; > + reg = <0 0x1400f000 0 0x1000>; > + interrupts = ; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_CCORR0>; > + }; > + > + aal0: aal@14010000 { > + compatible = "mediatek,mt8183-disp-aal", > + "mediatek,mt8173-disp-aal"; > + reg = <0 0x14010000 0 0x1000>; > + interrupts = ; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_AAL0>; > + }; > + > + gamma0: gamma@14011000 { > + compatible = "mediatek,mt8183-disp-gamma", > + "mediatek,mt8173-disp-gamma"; > + reg = <0 0x14011000 0 0x1000>; > + interrupts = ; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_GAMMA0>; > + }; > + > + dither0: dither@14012000 { > + compatible = "mediatek,mt8183-disp-dither"; > + reg = <0 0x14012000 0 0x1000>; > + interrupts = ; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_DITHER0>; > + }; > + > smi_common: smi@14019000 { > compatible = "mediatek,mt8183-smi-common", "syscon"; > reg = <0 0x14019000 0 0x1000>; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel