From: Robert Chiras <robert.chiras@nxp.com>
To: Marek Vasut <marex@denx.de>, Stefan Agner <stefan@agner.ch>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org,
NXP Linux Team <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Robert Chiras <robert.chiras@nxp.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 09/10] drm/mxsfb: Clear OUTSTANDING_REQS bits
Date: Wed, 26 Jun 2019 16:32:17 +0300 [thread overview]
Message-ID: <1561555938-21595-10-git-send-email-robert.chiras@nxp.com> (raw)
In-Reply-To: <1561555938-21595-1-git-send-email-robert.chiras@nxp.com>
Bit 21 can alter the CTRL2_OUTSTANDING_REQS value right after the eLCDIF
is enabled, since it comes up with default value of 1 (this behaviour
has been seen on some imx8 platforms).
In order to fix this, clear CTRL2_OUTSTANDING_REQS bits before setting
its value.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
---
drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
index 45ca16b..02a5684 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
@@ -223,7 +223,14 @@ static void mxsfb_enable_controller(struct mxsfb_drm_private *mxsfb)
clk_prepare_enable(mxsfb->clk);
if (mxsfb->devdata->ipversion >= 4) {
- writel(CTRL2_OUTSTANDING_REQS__REQ_16,
+ /*
+ * On some platforms, bit 21 is defaulted to 1, which may alter
+ * the below setting. So, to make sure we have the right setting
+ * clear all the bits for CTRL2_OUTSTANDING_REQS.
+ */
+ writel(CTRL2_OUTSTANDING_REQS(0x7),
+ mxsfb->base + LCDC_V4_CTRL2 + REG_CLR);
+ writel(CTRL2_OUTSTANDING_REQS(REQ_16),
mxsfb->base + LCDC_V4_CTRL2 + REG_SET);
/* Assert LCD Reset bit */
writel(CTRL2_LCD_RESET, mxsfb->base + LCDC_V4_CTRL2 + REG_SET);
--
2.7.4
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next prev parent reply other threads:[~2019-06-26 13:36 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-26 13:32 [PATCH 00/10] Improvements and fixes for mxsfb DRM driver Robert Chiras
2019-06-26 13:32 ` [PATCH 01/10] drm/mxsfb: Update mxsfb to support a bridge Robert Chiras
2019-07-21 10:26 ` Guido Günther
2019-06-26 13:32 ` [PATCH 02/10] drm/mxsfb: Update mxsfb with additional pixel formats Robert Chiras
2019-07-21 10:27 ` Guido Günther
2019-06-26 13:32 ` [PATCH 03/10] drm/mxsfb: Fix the vblank events Robert Chiras
2019-06-26 13:32 ` [PATCH 04/10] drm/mxsfb: Signal mode changed when bpp changed Robert Chiras
2019-06-26 13:32 ` [PATCH 05/10] dt-bindings: display: Add max-res property for mxsfb Robert Chiras
2019-07-22 17:48 ` Rob Herring
2019-08-14 8:05 ` [EXT] " Robert Chiras
2019-06-26 13:32 ` [PATCH 06/10] drm/mxsfb: Add max-res property for MXSFB Robert Chiras
2019-06-26 13:32 ` [PATCH 07/10] drm/mxsfb: Update mxsfb to support LCD reset Robert Chiras
2019-06-26 13:32 ` [PATCH 08/10] drm/mxsfb: Improve the axi clock usage Robert Chiras
2019-06-26 13:32 ` Robert Chiras [this message]
2019-06-26 13:32 ` [PATCH 10/10] drm/mxsfb: Add support for horizontal stride Robert Chiras
2019-07-11 15:04 ` [PATCH 00/10] Improvements and fixes for mxsfb DRM driver Guido Günther
2019-07-12 8:15 ` [EXT] " Robert Chiras
2019-07-16 14:54 ` Guido Günther
2019-07-20 21:09 ` Guido Günther
2019-08-13 10:23 ` Guido Günther
2019-08-13 10:36 ` [EXT] " Robert Chiras
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