* [PATCH V2 01/13] ARM: dts: bcm283x: Enable HDMI at board level
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
@ 2019-08-13 16:20 ` Stefan Wahren
2019-08-13 16:20 ` [PATCH V2 02/13] ARM: dts: bcm283x: Move BCM2835/6/7 specific to bcm2835-common.dtsi Stefan Wahren
` (12 subsequent siblings)
13 siblings, 0 replies; 31+ messages in thread
From: Stefan Wahren @ 2019-08-13 16:20 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
There might be headless setups of the Compute Module without HDMI,
so better enable HDMI at board level. Btw this allows moving HDMI
into bcm2835-common.dtsi.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
---
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 2 ++
arch/arm/boot/dts/bcm2835-rpi-a.dts | 2 ++
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 2 ++
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 2 ++
arch/arm/boot/dts/bcm2835-rpi-b.dts | 2 ++
arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts | 2 ++
arch/arm/boot/dts/bcm2835-rpi-zero-w.dts | 2 ++
arch/arm/boot/dts/bcm2835-rpi-zero.dts | 2 ++
arch/arm/boot/dts/bcm2835-rpi.dtsi | 5 -----
arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 2 ++
arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts | 2 ++
arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts | 2 ++
arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 2 ++
arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts | 2 ++
14 files changed, 26 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
index 5b42e9a..6c8ce39 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
@@ -104,6 +104,8 @@
&hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
};
&pwm {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
index b716214..17fdd48 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
@@ -99,6 +99,8 @@
&hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
};
&pwm {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
index 3318082..b0355c2 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
@@ -106,6 +106,8 @@
&hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
};
&pwm {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
index 97d7eb5..33b3b5c 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
@@ -99,6 +99,8 @@
&hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
};
&pwm {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
index 37e02a1..2b69957 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -94,6 +94,8 @@
&hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
};
&pwm {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts b/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts
index 41afea4..a75c882 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts
@@ -79,6 +79,8 @@
&hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
};
&sdhost {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
index f38f388..09a088f 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
@@ -105,6 +105,8 @@
&hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
};
&sdhci {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
index 5fd0686..6dd93c6 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
@@ -101,6 +101,8 @@
&hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
};
&sdhost {
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index f5125b7..6c6a7f6 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -67,11 +67,6 @@
power-domains = <&power RPI_POWER_DOMAIN_USB>;
};
-&hdmi {
- power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
- status = "okay";
-};
-
&vec {
power-domains = <&power RPI_POWER_DOMAIN_VEC>;
status = "okay";
diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
index 6a89999..0455a68 100644
--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
@@ -106,6 +106,8 @@
&hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
};
&pwm {
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
index 0e29aaa..66ab35e 100644
--- a/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
@@ -118,6 +118,8 @@
&hdmi {
hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
};
&pwm {
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
index a1487ae..74ed6d0 100644
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
@@ -125,6 +125,8 @@
&hdmi {
hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
};
&pwm {
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
index a36bfdb..054ecaa 100644
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
@@ -126,6 +126,8 @@
&hdmi {
hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
};
/* uart0 communicates with the BT module */
diff --git a/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts b/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts
index 433e306..588d941 100644
--- a/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts
+++ b/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts
@@ -78,6 +78,8 @@
&hdmi {
hpd-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
};
&sdhost {
--
2.7.4
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^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH V2 02/13] ARM: dts: bcm283x: Move BCM2835/6/7 specific to bcm2835-common.dtsi
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
2019-08-13 16:20 ` [PATCH V2 01/13] ARM: dts: bcm283x: Enable HDMI at board level Stefan Wahren
@ 2019-08-13 16:20 ` Stefan Wahren
2019-08-13 16:20 ` [PATCH V2 03/13] dt-bindings: bcm2835-cprman: Add bcm2711 support Stefan Wahren
` (11 subsequent siblings)
13 siblings, 0 replies; 31+ messages in thread
From: Stefan Wahren @ 2019-08-13 16:20 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
As preparation we want all common BCM2711 + BCM2835/6/7 functions in
bcm283x.dtsi and all BCM2835/6/7 specific in the new
bcm2835-common.dtsi.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Eric Anholt <eric@anholt.net>
---
arch/arm/boot/dts/bcm2835-common.dtsi | 183 ++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm2835.dtsi | 1 +
arch/arm/boot/dts/bcm2836.dtsi | 1 +
arch/arm/boot/dts/bcm2837.dtsi | 1 +
arch/arm/boot/dts/bcm283x.dtsi | 164 +-----------------------------
5 files changed, 187 insertions(+), 163 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm2835-common.dtsi
diff --git a/arch/arm/boot/dts/bcm2835-common.dtsi b/arch/arm/boot/dts/bcm2835-common.dtsi
new file mode 100644
index 0000000..003bbb6
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835-common.dtsi
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* This include file covers the common peripherals and configuration between
+ * bcm2835, bcm2836 and bcm2837 implementations.
+ */
+
+/ {
+ interrupt-parent = <&intc>;
+
+ soc {
+ dma: dma@7e007000 {
+ compatible = "brcm,bcm2835-dma";
+ reg = <0x7e007000 0xf00>;
+ interrupts = <1 16>,
+ <1 17>,
+ <1 18>,
+ <1 19>,
+ <1 20>,
+ <1 21>,
+ <1 22>,
+ <1 23>,
+ <1 24>,
+ <1 25>,
+ <1 26>,
+ /* dma channel 11-14 share one irq */
+ <1 27>,
+ <1 27>,
+ <1 27>,
+ <1 27>,
+ /* unused shared irq for all channels */
+ <1 28>;
+ interrupt-names = "dma0",
+ "dma1",
+ "dma2",
+ "dma3",
+ "dma4",
+ "dma5",
+ "dma6",
+ "dma7",
+ "dma8",
+ "dma9",
+ "dma10",
+ "dma11",
+ "dma12",
+ "dma13",
+ "dma14",
+ "dma-shared-all";
+ #dma-cells = <1>;
+ brcm,dma-channel-mask = <0x7f35>;
+ };
+
+ intc: interrupt-controller@7e00b200 {
+ compatible = "brcm,bcm2835-armctrl-ic";
+ reg = <0x7e00b200 0x200>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pm: watchdog@7e100000 {
+ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
+ #power-domain-cells = <1>;
+ #reset-cells = <1>;
+ reg = <0x7e100000 0x114>,
+ <0x7e00a000 0x24>;
+ clocks = <&clocks BCM2835_CLOCK_V3D>,
+ <&clocks BCM2835_CLOCK_PERI_IMAGE>,
+ <&clocks BCM2835_CLOCK_H264>,
+ <&clocks BCM2835_CLOCK_ISP>;
+ clock-names = "v3d", "peri_image", "h264", "isp";
+ system-power-controller;
+ };
+
+ pixelvalve@7e206000 {
+ compatible = "brcm,bcm2835-pixelvalve0";
+ reg = <0x7e206000 0x100>;
+ interrupts = <2 13>; /* pwa0 */
+ };
+
+ pixelvalve@7e207000 {
+ compatible = "brcm,bcm2835-pixelvalve1";
+ reg = <0x7e207000 0x100>;
+ interrupts = <2 14>; /* pwa1 */
+ };
+
+ thermal: thermal@7e212000 {
+ compatible = "brcm,bcm2835-thermal";
+ reg = <0x7e212000 0x8>;
+ clocks = <&clocks BCM2835_CLOCK_TSENS>;
+ #thermal-sensor-cells = <0>;
+ status = "disabled";
+ };
+
+ pixelvalve@7e807000 {
+ compatible = "brcm,bcm2835-pixelvalve2";
+ reg = <0x7e807000 0x100>;
+ interrupts = <2 10>; /* pixelvalve */
+ };
+
+ hdmi: hdmi@7e902000 {
+ compatible = "brcm,bcm2835-hdmi";
+ reg = <0x7e902000 0x600>,
+ <0x7e808000 0x100>;
+ interrupts = <2 8>, <2 9>;
+ ddc = <&i2c2>;
+ clocks = <&clocks BCM2835_PLLH_PIX>,
+ <&clocks BCM2835_CLOCK_HSM>;
+ clock-names = "pixel", "hdmi";
+ dmas = <&dma 17>;
+ dma-names = "audio-rx";
+ status = "disabled";
+ };
+
+ v3d: v3d@7ec00000 {
+ compatible = "brcm,bcm2835-v3d";
+ reg = <0x7ec00000 0x1000>;
+ interrupts = <1 10>;
+ };
+
+ vc4: gpu {
+ compatible = "brcm,bcm2835-vc4";
+ };
+ };
+};
+
+&cpu_thermal {
+ thermal-sensors = <&thermal>;
+};
+
+&gpio {
+ i2c_slave_gpio18: i2c_slave_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ jtag_gpio4: jtag_gpio4 {
+ brcm,pins = <4 5 6 12 13>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+
+ pwm0_gpio12: pwm0_gpio12 {
+ brcm,pins = <12>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_gpio18: pwm0_gpio18 {
+ brcm,pins = <18>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm0_gpio40: pwm0_gpio40 {
+ brcm,pins = <40>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio13: pwm1_gpio13 {
+ brcm,pins = <13>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio19: pwm1_gpio19 {
+ brcm,pins = <19>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm1_gpio41: pwm1_gpio41 {
+ brcm,pins = <41>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio45: pwm1_gpio45 {
+ brcm,pins = <45>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+};
+
+&i2s {
+ dmas = <&dma 2>, <&dma 3>;
+ dma-names = "tx", "rx";
+};
+
+&sdhost {
+ dmas = <&dma 13>;
+ dma-names = "rx-tx";
+};
+
+&spi {
+ dmas = <&dma 6>, <&dma 7>;
+ dma-names = "tx", "rx";
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index a5c3824..53bf457 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
#include "bcm283x.dtsi"
+#include "bcm2835-common.dtsi"
/ {
compatible = "brcm,bcm2835";
diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi
index c933e84..82d6c46 100644
--- a/arch/arm/boot/dts/bcm2836.dtsi
+++ b/arch/arm/boot/dts/bcm2836.dtsi
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
#include "bcm283x.dtsi"
+#include "bcm2835-common.dtsi"
/ {
compatible = "brcm,bcm2836";
diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
index beb6c50..9e95fee 100644
--- a/arch/arm/boot/dts/bcm2837.dtsi
+++ b/arch/arm/boot/dts/bcm2837.dtsi
@@ -1,4 +1,5 @@
#include "bcm283x.dtsi"
+#include "bcm2835-common.dtsi"
/ {
compatible = "brcm,bcm2837";
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 2d191fc..cbc9422 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -18,7 +18,6 @@
/ {
compatible = "brcm,bcm2835";
model = "BCM2835";
- interrupt-parent = <&intc>;
#address-cells = <1>;
#size-cells = <1>;
@@ -36,8 +35,6 @@
polling-delay-passive = <0>;
polling-delay = <1000>;
- thermal-sensors = <&thermal>;
-
trips {
cpu-crit {
temperature = <80000>;
@@ -73,68 +70,6 @@
interrupts = <1 11>;
};
- dma: dma@7e007000 {
- compatible = "brcm,bcm2835-dma";
- reg = <0x7e007000 0xf00>;
- interrupts = <1 16>,
- <1 17>,
- <1 18>,
- <1 19>,
- <1 20>,
- <1 21>,
- <1 22>,
- <1 23>,
- <1 24>,
- <1 25>,
- <1 26>,
- /* dma channel 11-14 share one irq */
- <1 27>,
- <1 27>,
- <1 27>,
- <1 27>,
- /* unused shared irq for all channels */
- <1 28>;
- interrupt-names = "dma0",
- "dma1",
- "dma2",
- "dma3",
- "dma4",
- "dma5",
- "dma6",
- "dma7",
- "dma8",
- "dma9",
- "dma10",
- "dma11",
- "dma12",
- "dma13",
- "dma14",
- "dma-shared-all";
- #dma-cells = <1>;
- brcm,dma-channel-mask = <0x7f35>;
- };
-
- intc: interrupt-controller@7e00b200 {
- compatible = "brcm,bcm2835-armctrl-ic";
- reg = <0x7e00b200 0x200>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pm: watchdog@7e100000 {
- compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
- #power-domain-cells = <1>;
- #reset-cells = <1>;
- reg = <0x7e100000 0x114>,
- <0x7e00a000 0x24>;
- clocks = <&clocks BCM2835_CLOCK_V3D>,
- <&clocks BCM2835_CLOCK_PERI_IMAGE>,
- <&clocks BCM2835_CLOCK_H264>,
- <&clocks BCM2835_CLOCK_ISP>;
- clock-names = "v3d", "peri_image", "h264", "isp";
- system-power-controller;
- };
-
clocks: cprman@7e101000 {
compatible = "brcm,bcm2835-cprman";
#clock-cells = <1>;
@@ -184,8 +119,7 @@
interrupt-controller;
#interrupt-cells = <2>;
- /* Defines pin muxing groups according to
- * BCM2835-ARM-Peripherals.pdf page 102.
+ /* Defines common pin muxing groups
*
* While each pin can have its mux selected
* for various functions individually, some
@@ -263,15 +197,7 @@
brcm,pins = <44 45>;
brcm,function = <BCM2835_FSEL_ALT2>;
};
- i2c_slave_gpio18: i2c_slave_gpio18 {
- brcm,pins = <18 19 20 21>;
- brcm,function = <BCM2835_FSEL_ALT3>;
- };
- jtag_gpio4: jtag_gpio4 {
- brcm,pins = <4 5 6 12 13>;
- brcm,function = <BCM2835_FSEL_ALT5>;
- };
jtag_gpio22: jtag_gpio22 {
brcm,pins = <22 23 24 25 26 27>;
brcm,function = <BCM2835_FSEL_ALT4>;
@@ -286,35 +212,6 @@
brcm,function = <BCM2835_FSEL_ALT2>;
};
- pwm0_gpio12: pwm0_gpio12 {
- brcm,pins = <12>;
- brcm,function = <BCM2835_FSEL_ALT0>;
- };
- pwm0_gpio18: pwm0_gpio18 {
- brcm,pins = <18>;
- brcm,function = <BCM2835_FSEL_ALT5>;
- };
- pwm0_gpio40: pwm0_gpio40 {
- brcm,pins = <40>;
- brcm,function = <BCM2835_FSEL_ALT0>;
- };
- pwm1_gpio13: pwm1_gpio13 {
- brcm,pins = <13>;
- brcm,function = <BCM2835_FSEL_ALT0>;
- };
- pwm1_gpio19: pwm1_gpio19 {
- brcm,pins = <19>;
- brcm,function = <BCM2835_FSEL_ALT5>;
- };
- pwm1_gpio41: pwm1_gpio41 {
- brcm,pins = <41>;
- brcm,function = <BCM2835_FSEL_ALT0>;
- };
- pwm1_gpio45: pwm1_gpio45 {
- brcm,pins = <45>;
- brcm,function = <BCM2835_FSEL_ALT0>;
- };
-
sdhost_gpio48: sdhost_gpio48 {
brcm,pins = <48 49 50 51 52 53>;
brcm,function = <BCM2835_FSEL_ALT0>;
@@ -410,8 +307,6 @@
reg = <0x7e202000 0x100>;
interrupts = <2 24>;
clocks = <&clocks BCM2835_CLOCK_VPU>;
- dmas = <&dma 13>;
- dma-names = "rx-tx";
status = "disabled";
};
@@ -419,10 +314,6 @@
compatible = "brcm,bcm2835-i2s";
reg = <0x7e203000 0x24>;
clocks = <&clocks BCM2835_CLOCK_PCM>;
-
- dmas = <&dma 2>,
- <&dma 3>;
- dma-names = "tx", "rx";
status = "disabled";
};
@@ -431,8 +322,6 @@
reg = <0x7e204000 0x200>;
interrupts = <2 22>;
clocks = <&clocks BCM2835_CLOCK_VPU>;
- dmas = <&dma 6>, <&dma 7>;
- dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -448,18 +337,6 @@
status = "disabled";
};
- pixelvalve@7e206000 {
- compatible = "brcm,bcm2835-pixelvalve0";
- reg = <0x7e206000 0x100>;
- interrupts = <2 13>; /* pwa0 */
- };
-
- pixelvalve@7e207000 {
- compatible = "brcm,bcm2835-pixelvalve1";
- reg = <0x7e207000 0x100>;
- interrupts = <2 14>; /* pwa1 */
- };
-
dpi: dpi@7e208000 {
compatible = "brcm,bcm2835-dpi";
reg = <0x7e208000 0x8c>;
@@ -490,14 +367,6 @@
};
- thermal: thermal@7e212000 {
- compatible = "brcm,bcm2835-thermal";
- reg = <0x7e212000 0x8>;
- clocks = <&clocks BCM2835_CLOCK_TSENS>;
- #thermal-sensor-cells = <0>;
- status = "disabled";
- };
-
aux: aux@7e215000 {
compatible = "brcm,bcm2835-aux";
#clock-cells = <1>;
@@ -605,26 +474,6 @@
status = "disabled";
};
- pixelvalve@7e807000 {
- compatible = "brcm,bcm2835-pixelvalve2";
- reg = <0x7e807000 0x100>;
- interrupts = <2 10>; /* pixelvalve */
- };
-
- hdmi: hdmi@7e902000 {
- compatible = "brcm,bcm2835-hdmi";
- reg = <0x7e902000 0x600>,
- <0x7e808000 0x100>;
- interrupts = <2 8>, <2 9>;
- ddc = <&i2c2>;
- clocks = <&clocks BCM2835_PLLH_PIX>,
- <&clocks BCM2835_CLOCK_HSM>;
- clock-names = "pixel", "hdmi";
- dmas = <&dma 17>;
- dma-names = "audio-rx";
- status = "disabled";
- };
-
usb: usb@7e980000 {
compatible = "brcm,bcm2835-usb";
reg = <0x7e980000 0x10000>;
@@ -636,17 +485,6 @@
phys = <&usbphy>;
phy-names = "usb2-phy";
};
-
- v3d: v3d@7ec00000 {
- compatible = "brcm,bcm2835-v3d";
- reg = <0x7ec00000 0x1000>;
- interrupts = <1 10>;
- power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
- };
-
- vc4: gpu {
- compatible = "brcm,bcm2835-vc4";
- };
};
clocks {
--
2.7.4
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^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH V2 03/13] dt-bindings: bcm2835-cprman: Add bcm2711 support
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
2019-08-13 16:20 ` [PATCH V2 01/13] ARM: dts: bcm283x: Enable HDMI at board level Stefan Wahren
2019-08-13 16:20 ` [PATCH V2 02/13] ARM: dts: bcm283x: Move BCM2835/6/7 specific to bcm2835-common.dtsi Stefan Wahren
@ 2019-08-13 16:20 ` Stefan Wahren
2019-08-16 17:41 ` Stephen Boyd
2019-08-27 16:00 ` Rob Herring
2019-08-13 16:20 ` [PATCH V2 04/13] clk: bcm2835: Introduce SoC specific clock registration Stefan Wahren
` (10 subsequent siblings)
13 siblings, 2 replies; 31+ messages in thread
From: Stefan Wahren @ 2019-08-13 16:20 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
The new BCM2711 supports an additional clock for the emmc2 block.
So we need an additional compatible.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Eric Anholt <eric@anholt.net>
---
Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt | 4 +++-
include/dt-bindings/clock/bcm2835.h | 2 ++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt b/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
index dd906db..9e0b03a 100644
--- a/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
+++ b/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
@@ -12,7 +12,9 @@ clock generators, but a few (like the ARM or HDMI) will source from
the PLL dividers directly.
Required properties:
-- compatible: Should be "brcm,bcm2835-cprman"
+- compatible: should be one of the following,
+ "brcm,bcm2711-cprman"
+ "brcm,bcm2835-cprman"
- #clock-cells: Should be <1>. The permitted clock-specifier values can be
found in include/dt-bindings/clock/bcm2835.h
- reg: Specifies base physical address and size of the registers
diff --git a/include/dt-bindings/clock/bcm2835.h b/include/dt-bindings/clock/bcm2835.h
index 2cec01f..b60c0343 100644
--- a/include/dt-bindings/clock/bcm2835.h
+++ b/include/dt-bindings/clock/bcm2835.h
@@ -58,3 +58,5 @@
#define BCM2835_CLOCK_DSI1E 48
#define BCM2835_CLOCK_DSI0P 49
#define BCM2835_CLOCK_DSI1P 50
+
+#define BCM2711_CLOCK_EMMC2 51
--
2.7.4
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^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH V2 03/13] dt-bindings: bcm2835-cprman: Add bcm2711 support
2019-08-13 16:20 ` [PATCH V2 03/13] dt-bindings: bcm2835-cprman: Add bcm2711 support Stefan Wahren
@ 2019-08-16 17:41 ` Stephen Boyd
2019-08-27 16:00 ` Rob Herring
1 sibling, 0 replies; 31+ messages in thread
From: Stephen Boyd @ 2019-08-16 17:41 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Mark Rutland, Michael Turquette,
Ray Jui, Rob Herring, Scott Branden, Stefan Wahren, Wolfram Sang
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
Quoting Stefan Wahren (2019-08-13 09:20:38)
> The new BCM2711 supports an additional clock for the emmc2 block.
> So we need an additional compatible.
>
> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
> Acked-by: Eric Anholt <eric@anholt.net>
> ---
If you want, just send the clk patches (this and the next three) to me
and linux-clk list as a series. I will apply them directly once the
minor comments are fixed.
> Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt | 4 +++-
> include/dt-bindings/clock/bcm2835.h | 2 ++
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH V2 03/13] dt-bindings: bcm2835-cprman: Add bcm2711 support
2019-08-13 16:20 ` [PATCH V2 03/13] dt-bindings: bcm2835-cprman: Add bcm2711 support Stefan Wahren
2019-08-16 17:41 ` Stephen Boyd
@ 2019-08-27 16:00 ` Rob Herring
1 sibling, 0 replies; 31+ messages in thread
From: Rob Herring @ 2019-08-27 16:00 UTC (permalink / raw)
To: Stefan Wahren
Cc: devicetree, Florian Fainelli, Scott Branden, Wolfram Sang,
Ray Jui, Stefan Wahren, Eric Anholt, bcm-kernel-feedback-list,
linux-i2c, linux-clk, linux-arm-kernel, linux-rpi-kernel
On Tue, 13 Aug 2019 18:20:38 +0200, Stefan Wahren wrote:
> The new BCM2711 supports an additional clock for the emmc2 block.
> So we need an additional compatible.
>
> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
> Acked-by: Eric Anholt <eric@anholt.net>
> ---
> Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt | 4 +++-
> include/dt-bindings/clock/bcm2835.h | 2 ++
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH V2 04/13] clk: bcm2835: Introduce SoC specific clock registration
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
` (2 preceding siblings ...)
2019-08-13 16:20 ` [PATCH V2 03/13] dt-bindings: bcm2835-cprman: Add bcm2711 support Stefan Wahren
@ 2019-08-13 16:20 ` Stefan Wahren
2019-08-13 16:20 ` [PATCH V2 05/13] clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support Stefan Wahren
` (9 subsequent siblings)
13 siblings, 0 replies; 31+ messages in thread
From: Stefan Wahren @ 2019-08-13 16:20 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
In order to support SoC specific clocks (e.g. emmc2 for BCM2711), we
extend the description with a SoC support flag. This approach avoids long
and mostly redundant lists of clock IDs. Since only PLLH is specific to
BCM2835, we register the rest of the clocks as common to all SoC.
Suggested-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Acked-by: Eric Anholt <eric@anholt.net>
---
drivers/clk/bcm/clk-bcm2835.c | 113 +++++++++++++++++++++++++++++++++++-------
1 file changed, 96 insertions(+), 17 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 867ae3c..21cd952 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -31,7 +31,7 @@
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/module.h>
-#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <dt-bindings/clock/bcm2835.h>
@@ -289,6 +289,9 @@
#define LOCK_TIMEOUT_NS 100000000
#define BCM2835_MAX_FB_RATE 1750000000u
+#define SOC_BCM2835 BIT(0)
+#define SOC_ALL (SOC_BCM2835)
+
/*
* Names of clocks used within the driver that need to be replaced
* with an external parent's name. This array is in the order that
@@ -320,6 +323,10 @@ struct bcm2835_cprman {
struct clk_hw_onecell_data onecell;
};
+struct cprman_plat_data {
+ unsigned int soc;
+};
+
static inline void cprman_write(struct bcm2835_cprman *cprman, u32 reg, u32 val)
{
writel(CM_PASSWORD | val, cprman->regs + reg);
@@ -1451,22 +1458,28 @@ typedef struct clk_hw *(*bcm2835_clk_register)(struct bcm2835_cprman *cprman,
const void *data);
struct bcm2835_clk_desc {
bcm2835_clk_register clk_register;
+ unsigned int supported;
const void *data;
};
/* assignment helper macros for different clock types */
-#define _REGISTER(f, ...) { .clk_register = (bcm2835_clk_register)f, \
- .data = __VA_ARGS__ }
-#define REGISTER_PLL(...) _REGISTER(&bcm2835_register_pll, \
+#define _REGISTER(f, s, ...) { .clk_register = (bcm2835_clk_register)f, \
+ .supported = s, \
+ .data = __VA_ARGS__ }
+#define REGISTER_PLL(s, ...) _REGISTER(&bcm2835_register_pll, \
+ s, \
&(struct bcm2835_pll_data) \
{__VA_ARGS__})
-#define REGISTER_PLL_DIV(...) _REGISTER(&bcm2835_register_pll_divider, \
- &(struct bcm2835_pll_divider_data) \
- {__VA_ARGS__})
-#define REGISTER_CLK(...) _REGISTER(&bcm2835_register_clock, \
+#define REGISTER_PLL_DIV(s, ...) _REGISTER(&bcm2835_register_pll_divider, \
+ s, \
+ &(struct bcm2835_pll_divider_data) \
+ {__VA_ARGS__})
+#define REGISTER_CLK(s, ...) _REGISTER(&bcm2835_register_clock, \
+ s, \
&(struct bcm2835_clock_data) \
{__VA_ARGS__})
-#define REGISTER_GATE(...) _REGISTER(&bcm2835_register_gate, \
+#define REGISTER_GATE(s, ...) _REGISTER(&bcm2835_register_gate, \
+ s, \
&(struct bcm2835_gate_data) \
{__VA_ARGS__})
@@ -1480,7 +1493,8 @@ static const char *const bcm2835_clock_osc_parents[] = {
"testdebug1"
};
-#define REGISTER_OSC_CLK(...) REGISTER_CLK( \
+#define REGISTER_OSC_CLK(s, ...) REGISTER_CLK( \
+ s, \
.num_mux_parents = ARRAY_SIZE(bcm2835_clock_osc_parents), \
.parents = bcm2835_clock_osc_parents, \
__VA_ARGS__)
@@ -1497,7 +1511,8 @@ static const char *const bcm2835_clock_per_parents[] = {
"pllh_aux",
};
-#define REGISTER_PER_CLK(...) REGISTER_CLK( \
+#define REGISTER_PER_CLK(s, ...) REGISTER_CLK( \
+ s, \
.num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents), \
.parents = bcm2835_clock_per_parents, \
__VA_ARGS__)
@@ -1522,7 +1537,8 @@ static const char *const bcm2835_pcm_per_parents[] = {
"-",
};
-#define REGISTER_PCM_CLK(...) REGISTER_CLK( \
+#define REGISTER_PCM_CLK(s, ...) REGISTER_CLK( \
+ s, \
.num_mux_parents = ARRAY_SIZE(bcm2835_pcm_per_parents), \
.parents = bcm2835_pcm_per_parents, \
__VA_ARGS__)
@@ -1541,7 +1557,8 @@ static const char *const bcm2835_clock_vpu_parents[] = {
"pllc_core2",
};
-#define REGISTER_VPU_CLK(...) REGISTER_CLK( \
+#define REGISTER_VPU_CLK(s, ...) REGISTER_CLK( \
+ s, \
.num_mux_parents = ARRAY_SIZE(bcm2835_clock_vpu_parents), \
.parents = bcm2835_clock_vpu_parents, \
__VA_ARGS__)
@@ -1577,12 +1594,14 @@ static const char *const bcm2835_clock_dsi1_parents[] = {
"dsi1_byte_inv",
};
-#define REGISTER_DSI0_CLK(...) REGISTER_CLK( \
+#define REGISTER_DSI0_CLK(s, ...) REGISTER_CLK( \
+ s, \
.num_mux_parents = ARRAY_SIZE(bcm2835_clock_dsi0_parents), \
.parents = bcm2835_clock_dsi0_parents, \
__VA_ARGS__)
-#define REGISTER_DSI1_CLK(...) REGISTER_CLK( \
+#define REGISTER_DSI1_CLK(s, ...) REGISTER_CLK( \
+ s, \
.num_mux_parents = ARRAY_SIZE(bcm2835_clock_dsi1_parents), \
.parents = bcm2835_clock_dsi1_parents, \
__VA_ARGS__)
@@ -1602,6 +1621,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
* AUDIO domain is on.
*/
[BCM2835_PLLA] = REGISTER_PLL(
+ SOC_ALL,
.name = "plla",
.cm_ctrl_reg = CM_PLLA,
.a2w_ctrl_reg = A2W_PLLA_CTRL,
@@ -1616,6 +1636,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.max_rate = 2400000000u,
.max_fb_rate = BCM2835_MAX_FB_RATE),
[BCM2835_PLLA_CORE] = REGISTER_PLL_DIV(
+ SOC_ALL,
.name = "plla_core",
.source_pll = "plla",
.cm_reg = CM_PLLA,
@@ -1625,6 +1646,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.fixed_divider = 1,
.flags = CLK_SET_RATE_PARENT),
[BCM2835_PLLA_PER] = REGISTER_PLL_DIV(
+ SOC_ALL,
.name = "plla_per",
.source_pll = "plla",
.cm_reg = CM_PLLA,
@@ -1634,6 +1656,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.fixed_divider = 1,
.flags = CLK_SET_RATE_PARENT),
[BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV(
+ SOC_ALL,
.name = "plla_dsi0",
.source_pll = "plla",
.cm_reg = CM_PLLA,
@@ -1642,6 +1665,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.hold_mask = CM_PLLA_HOLDDSI0,
.fixed_divider = 1),
[BCM2835_PLLA_CCP2] = REGISTER_PLL_DIV(
+ SOC_ALL,
.name = "plla_ccp2",
.source_pll = "plla",
.cm_reg = CM_PLLA,
@@ -1663,6 +1687,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
* AUDIO domain is on.
*/
[BCM2835_PLLC] = REGISTER_PLL(
+ SOC_ALL,
.name = "pllc",
.cm_ctrl_reg = CM_PLLC,
.a2w_ctrl_reg = A2W_PLLC_CTRL,
@@ -1677,6 +1702,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.max_rate = 3000000000u,
.max_fb_rate = BCM2835_MAX_FB_RATE),
[BCM2835_PLLC_CORE0] = REGISTER_PLL_DIV(
+ SOC_ALL,
.name = "pllc_core0",
.source_pll = "pllc",
.cm_reg = CM_PLLC,
@@ -1686,6 +1712,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.fixed_divider = 1,
.flags = CLK_SET_RATE_PARENT),
[BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV(
+ SOC_ALL,
.name = "pllc_core1",
.source_pll = "pllc",
.cm_reg = CM_PLLC,
@@ -1695,6 +1722,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.fixed_divider = 1,
.flags = CLK_SET_RATE_PARENT),
[BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV(
+ SOC_ALL,
.name = "pllc_core2",
.source_pll = "pllc",
.cm_reg = CM_PLLC,
@@ -1704,6 +1732,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.fixed_divider = 1,
.flags = CLK_SET_RATE_PARENT),
[BCM2835_PLLC_PER] = REGISTER_PLL_DIV(
+ SOC_ALL,
.name = "pllc_per",
.source_pll = "pllc",
.cm_reg = CM_PLLC,
@@ -1720,6 +1749,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
* AUDIO domain is on.
*/
[BCM2835_PLLD] = REGISTER_PLL(
+ SOC_ALL,
.name = "plld",
.cm_ctrl_reg = CM_PLLD,
.a2w_ctrl_reg = A2W_PLLD_CTRL,
@@ -1734,6 +1764,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.max_rate = 2400000000u,
.max_fb_rate = BCM2835_MAX_FB_RATE),
[BCM2835_PLLD_CORE] = REGISTER_PLL_DIV(
+ SOC_ALL,
.name = "plld_core",
.source_pll = "plld",
.cm_reg = CM_PLLD,
@@ -1743,6 +1774,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.fixed_divider = 1,
.flags = CLK_SET_RATE_PARENT),
[BCM2835_PLLD_PER] = REGISTER_PLL_DIV(
+ SOC_ALL,
.name = "plld_per",
.source_pll = "plld",
.cm_reg = CM_PLLD,
@@ -1752,6 +1784,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.fixed_divider = 1,
.flags = CLK_SET_RATE_PARENT),
[BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV(
+ SOC_ALL,
.name = "plld_dsi0",
.source_pll = "plld",
.cm_reg = CM_PLLD,
@@ -1760,6 +1793,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.hold_mask = CM_PLLD_HOLDDSI0,
.fixed_divider = 1),
[BCM2835_PLLD_DSI1] = REGISTER_PLL_DIV(
+ SOC_ALL,
.name = "plld_dsi1",
.source_pll = "plld",
.cm_reg = CM_PLLD,
@@ -1775,6 +1809,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
* It is in the HDMI power domain.
*/
[BCM2835_PLLH] = REGISTER_PLL(
+ SOC_BCM2835,
"pllh",
.cm_ctrl_reg = CM_PLLH,
.a2w_ctrl_reg = A2W_PLLH_CTRL,
@@ -1789,6 +1824,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.max_rate = 3000000000u,
.max_fb_rate = BCM2835_MAX_FB_RATE),
[BCM2835_PLLH_RCAL] = REGISTER_PLL_DIV(
+ SOC_BCM2835,
.name = "pllh_rcal",
.source_pll = "pllh",
.cm_reg = CM_PLLH,
@@ -1798,6 +1834,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.fixed_divider = 10,
.flags = CLK_SET_RATE_PARENT),
[BCM2835_PLLH_AUX] = REGISTER_PLL_DIV(
+ SOC_BCM2835,
.name = "pllh_aux",
.source_pll = "pllh",
.cm_reg = CM_PLLH,
@@ -1807,6 +1844,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.fixed_divider = 1,
.flags = CLK_SET_RATE_PARENT),
[BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(
+ SOC_BCM2835,
.name = "pllh_pix",
.source_pll = "pllh",
.cm_reg = CM_PLLH,
@@ -1822,6 +1860,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
/* One Time Programmable Memory clock. Maximum 10Mhz. */
[BCM2835_CLOCK_OTP] = REGISTER_OSC_CLK(
+ SOC_ALL,
.name = "otp",
.ctl_reg = CM_OTPCTL,
.div_reg = CM_OTPDIV,
@@ -1833,6 +1872,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
* bythe watchdog timer and the camera pulse generator.
*/
[BCM2835_CLOCK_TIMER] = REGISTER_OSC_CLK(
+ SOC_ALL,
.name = "timer",
.ctl_reg = CM_TIMERCTL,
.div_reg = CM_TIMERDIV,
@@ -1843,12 +1883,14 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
* Generally run at 2Mhz, max 5Mhz.
*/
[BCM2835_CLOCK_TSENS] = REGISTER_OSC_CLK(
+ SOC_ALL,
.name = "tsens",
.ctl_reg = CM_TSENSCTL,
.div_reg = CM_TSENSDIV,
.int_bits = 5,
.frac_bits = 0),
[BCM2835_CLOCK_TEC] = REGISTER_OSC_CLK(
+ SOC_ALL,
.name = "tec",
.ctl_reg = CM_TECCTL,
.div_reg = CM_TECDIV,
@@ -1857,6 +1899,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
/* clocks with vpu parent mux */
[BCM2835_CLOCK_H264] = REGISTER_VPU_CLK(
+ SOC_ALL,
.name = "h264",
.ctl_reg = CM_H264CTL,
.div_reg = CM_H264DIV,
@@ -1864,6 +1907,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.frac_bits = 8,
.tcnt_mux = 1),
[BCM2835_CLOCK_ISP] = REGISTER_VPU_CLK(
+ SOC_ALL,
.name = "isp",
.ctl_reg = CM_ISPCTL,
.div_reg = CM_ISPDIV,
@@ -1876,6 +1920,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
* in the SDRAM controller can't be used.
*/
[BCM2835_CLOCK_SDRAM] = REGISTER_VPU_CLK(
+ SOC_ALL,
.name = "sdram",
.ctl_reg = CM_SDCCTL,
.div_reg = CM_SDCDIV,
@@ -1883,6 +1928,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.frac_bits = 0,
.tcnt_mux = 3),
[BCM2835_CLOCK_V3D] = REGISTER_VPU_CLK(
+ SOC_ALL,
.name = "v3d",
.ctl_reg = CM_V3DCTL,
.div_reg = CM_V3DDIV,
@@ -1896,6 +1942,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
* in various hardware documentation.
*/
[BCM2835_CLOCK_VPU] = REGISTER_VPU_CLK(
+ SOC_ALL,
.name = "vpu",
.ctl_reg = CM_VPUCTL,
.div_reg = CM_VPUDIV,
@@ -1907,6 +1954,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
/* clocks with per parent mux */
[BCM2835_CLOCK_AVEO] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "aveo",
.ctl_reg = CM_AVEOCTL,
.div_reg = CM_AVEODIV,
@@ -1914,6 +1962,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.frac_bits = 0,
.tcnt_mux = 38),
[BCM2835_CLOCK_CAM0] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "cam0",
.ctl_reg = CM_CAM0CTL,
.div_reg = CM_CAM0DIV,
@@ -1921,6 +1970,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.frac_bits = 8,
.tcnt_mux = 14),
[BCM2835_CLOCK_CAM1] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "cam1",
.ctl_reg = CM_CAM1CTL,
.div_reg = CM_CAM1DIV,
@@ -1928,12 +1978,14 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.frac_bits = 8,
.tcnt_mux = 15),
[BCM2835_CLOCK_DFT] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "dft",
.ctl_reg = CM_DFTCTL,
.div_reg = CM_DFTDIV,
.int_bits = 5,
.frac_bits = 0),
[BCM2835_CLOCK_DPI] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "dpi",
.ctl_reg = CM_DPICTL,
.div_reg = CM_DPIDIV,
@@ -1943,6 +1995,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
/* Arasan EMMC clock */
[BCM2835_CLOCK_EMMC] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "emmc",
.ctl_reg = CM_EMMCCTL,
.div_reg = CM_EMMCDIV,
@@ -1952,6 +2005,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
/* General purpose (GPIO) clocks */
[BCM2835_CLOCK_GP0] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "gp0",
.ctl_reg = CM_GP0CTL,
.div_reg = CM_GP0DIV,
@@ -1960,6 +2014,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.is_mash_clock = true,
.tcnt_mux = 20),
[BCM2835_CLOCK_GP1] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "gp1",
.ctl_reg = CM_GP1CTL,
.div_reg = CM_GP1DIV,
@@ -1969,6 +2024,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.is_mash_clock = true,
.tcnt_mux = 21),
[BCM2835_CLOCK_GP2] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "gp2",
.ctl_reg = CM_GP2CTL,
.div_reg = CM_GP2DIV,
@@ -1978,6 +2034,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
/* HDMI state machine */
[BCM2835_CLOCK_HSM] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "hsm",
.ctl_reg = CM_HSMCTL,
.div_reg = CM_HSMDIV,
@@ -1985,6 +2042,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.frac_bits = 8,
.tcnt_mux = 22),
[BCM2835_CLOCK_PCM] = REGISTER_PCM_CLK(
+ SOC_ALL,
.name = "pcm",
.ctl_reg = CM_PCMCTL,
.div_reg = CM_PCMDIV,
@@ -1994,6 +2052,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.low_jitter = true,
.tcnt_mux = 23),
[BCM2835_CLOCK_PWM] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "pwm",
.ctl_reg = CM_PWMCTL,
.div_reg = CM_PWMDIV,
@@ -2002,6 +2061,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.is_mash_clock = true,
.tcnt_mux = 24),
[BCM2835_CLOCK_SLIM] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "slim",
.ctl_reg = CM_SLIMCTL,
.div_reg = CM_SLIMDIV,
@@ -2010,6 +2070,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.is_mash_clock = true,
.tcnt_mux = 25),
[BCM2835_CLOCK_SMI] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "smi",
.ctl_reg = CM_SMICTL,
.div_reg = CM_SMIDIV,
@@ -2017,6 +2078,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.frac_bits = 8,
.tcnt_mux = 27),
[BCM2835_CLOCK_UART] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "uart",
.ctl_reg = CM_UARTCTL,
.div_reg = CM_UARTDIV,
@@ -2026,6 +2088,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
/* TV encoder clock. Only operating frequency is 108Mhz. */
[BCM2835_CLOCK_VEC] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "vec",
.ctl_reg = CM_VECCTL,
.div_reg = CM_VECDIV,
@@ -2040,6 +2103,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
/* dsi clocks */
[BCM2835_CLOCK_DSI0E] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "dsi0e",
.ctl_reg = CM_DSI0ECTL,
.div_reg = CM_DSI0EDIV,
@@ -2047,6 +2111,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.frac_bits = 8,
.tcnt_mux = 18),
[BCM2835_CLOCK_DSI1E] = REGISTER_PER_CLK(
+ SOC_ALL,
.name = "dsi1e",
.ctl_reg = CM_DSI1ECTL,
.div_reg = CM_DSI1EDIV,
@@ -2054,6 +2119,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.frac_bits = 8,
.tcnt_mux = 19),
[BCM2835_CLOCK_DSI0P] = REGISTER_DSI0_CLK(
+ SOC_ALL,
.name = "dsi0p",
.ctl_reg = CM_DSI0PCTL,
.div_reg = CM_DSI0PDIV,
@@ -2061,6 +2127,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.frac_bits = 0,
.tcnt_mux = 12),
[BCM2835_CLOCK_DSI1P] = REGISTER_DSI1_CLK(
+ SOC_ALL,
.name = "dsi1p",
.ctl_reg = CM_DSI1PCTL,
.div_reg = CM_DSI1PDIV,
@@ -2077,6 +2144,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
* non-stop vpu clock.
*/
[BCM2835_CLOCK_PERI_IMAGE] = REGISTER_GATE(
+ SOC_ALL,
.name = "peri_image",
.parent = "vpu",
.ctl_reg = CM_PERIICTL),
@@ -2109,9 +2177,14 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
struct resource *res;
const struct bcm2835_clk_desc *desc;
const size_t asize = ARRAY_SIZE(clk_desc_array);
+ const struct cprman_plat_data *pdata;
size_t i;
int ret;
+ pdata = of_device_get_match_data(&pdev->dev);
+ if (!pdata)
+ return -ENODEV;
+
cprman = devm_kzalloc(dev,
struct_size(cprman, onecell.hws, asize),
GFP_KERNEL);
@@ -2147,8 +2220,10 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
for (i = 0; i < asize; i++) {
desc = &clk_desc_array[i];
- if (desc->clk_register && desc->data)
+ if (desc->clk_register && desc->data &&
+ (desc->supported & pdata->soc)) {
hws[i] = desc->clk_register(cprman, desc->data);
+ }
}
ret = bcm2835_mark_sdc_parent_critical(hws[BCM2835_CLOCK_SDRAM]->clk);
@@ -2159,8 +2234,12 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
&cprman->onecell);
}
+static const struct cprman_plat_data cprman_bcm2835_plat_data = {
+ .soc = SOC_BCM2835,
+};
+
static const struct of_device_id bcm2835_clk_of_match[] = {
- { .compatible = "brcm,bcm2835-cprman", },
+ { .compatible = "brcm,bcm2835-cprman", .data = &cprman_bcm2835_plat_data },
{}
};
MODULE_DEVICE_TABLE(of, bcm2835_clk_of_match);
--
2.7.4
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH V2 05/13] clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
` (3 preceding siblings ...)
2019-08-13 16:20 ` [PATCH V2 04/13] clk: bcm2835: Introduce SoC specific clock registration Stefan Wahren
@ 2019-08-13 16:20 ` Stefan Wahren
2019-09-12 17:24 ` Matthias Brugger
2019-08-13 16:20 ` [PATCH V2 06/13] clk: bcm2835: Mark PLLD_PER as CRITICAL Stefan Wahren
` (8 subsequent siblings)
13 siblings, 1 reply; 31+ messages in thread
From: Stefan Wahren @ 2019-08-13 16:20 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
The new BCM2711 supports an additional clock for the emmc2 block.
So add a new compatible and register this clock only for BCM2711.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Acked-by: Eric Anholt <eric@anholt.net>
---
drivers/clk/bcm/clk-bcm2835.c | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 21cd952..fdf672a 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -114,6 +114,8 @@
#define CM_AVEODIV 0x1bc
#define CM_EMMCCTL 0x1c0
#define CM_EMMCDIV 0x1c4
+#define CM_EMMC2CTL 0x1d0
+#define CM_EMMC2DIV 0x1d4
/* General bits for the CM_*CTL regs */
# define CM_ENABLE BIT(4)
@@ -290,7 +292,8 @@
#define BCM2835_MAX_FB_RATE 1750000000u
#define SOC_BCM2835 BIT(0)
-#define SOC_ALL (SOC_BCM2835)
+#define SOC_BCM2711 BIT(1)
+#define SOC_ALL (SOC_BCM2835 | SOC_BCM2711)
/*
* Names of clocks used within the driver that need to be replaced
@@ -2003,6 +2006,16 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.frac_bits = 8,
.tcnt_mux = 39),
+ /* EMMC2 clock (only available for BCM2711) */
+ [BCM2711_CLOCK_EMMC2] = REGISTER_PER_CLK(
+ SOC_BCM2711,
+ .name = "emmc2",
+ .ctl_reg = CM_EMMC2CTL,
+ .div_reg = CM_EMMC2DIV,
+ .int_bits = 4,
+ .frac_bits = 8,
+ .tcnt_mux = 42),
+
/* General purpose (GPIO) clocks */
[BCM2835_CLOCK_GP0] = REGISTER_PER_CLK(
SOC_ALL,
@@ -2238,8 +2251,13 @@ static const struct cprman_plat_data cprman_bcm2835_plat_data = {
.soc = SOC_BCM2835,
};
+static const struct cprman_plat_data cprman_bcm2711_plat_data = {
+ .soc = SOC_BCM2711,
+};
+
static const struct of_device_id bcm2835_clk_of_match[] = {
{ .compatible = "brcm,bcm2835-cprman", .data = &cprman_bcm2835_plat_data },
+ { .compatible = "brcm,bcm2711-cprman", .data = &cprman_bcm2711_plat_data },
{}
};
MODULE_DEVICE_TABLE(of, bcm2835_clk_of_match);
--
2.7.4
_______________________________________________
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^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH V2 05/13] clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support
2019-08-13 16:20 ` [PATCH V2 05/13] clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support Stefan Wahren
@ 2019-09-12 17:24 ` Matthias Brugger
2019-09-12 18:52 ` Eric Anholt
0 siblings, 1 reply; 31+ messages in thread
From: Matthias Brugger @ 2019-09-12 17:24 UTC (permalink / raw)
To: Stefan Wahren, Eric Anholt, Florian Fainelli, Ray Jui,
Scott Branden, Wolfram Sang, Rob Herring, Mark Rutland,
Michael Turquette, Stephen Boyd
Cc: devicetree, bcm-kernel-feedback-list, linux-i2c, linux-clk,
linux-arm-kernel, linux-rpi-kernel
On 13/08/2019 18:20, Stefan Wahren wrote:
> The new BCM2711 supports an additional clock for the emmc2 block.
> So add a new compatible and register this clock only for BCM2711.
>
> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
> Reviewed-by: Matthias Brugger <mbrugger@suse.com>
> Acked-by: Eric Anholt <eric@anholt.net>
> ---
> drivers/clk/bcm/clk-bcm2835.c | 20 +++++++++++++++++++-
> 1 file changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
> index 21cd952..fdf672a 100644
> --- a/drivers/clk/bcm/clk-bcm2835.c
> +++ b/drivers/clk/bcm/clk-bcm2835.c
> @@ -114,6 +114,8 @@
> #define CM_AVEODIV 0x1bc
> #define CM_EMMCCTL 0x1c0
> #define CM_EMMCDIV 0x1c4
> +#define CM_EMMC2CTL 0x1d0
> +#define CM_EMMC2DIV 0x1d4
>
> /* General bits for the CM_*CTL regs */
> # define CM_ENABLE BIT(4)
> @@ -290,7 +292,8 @@
> #define BCM2835_MAX_FB_RATE 1750000000u
>
> #define SOC_BCM2835 BIT(0)
> -#define SOC_ALL (SOC_BCM2835)
> +#define SOC_BCM2711 BIT(1)
> +#define SOC_ALL (SOC_BCM2835 | SOC_BCM2711)
>
> /*
> * Names of clocks used within the driver that need to be replaced
> @@ -2003,6 +2006,16 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
> .frac_bits = 8,
> .tcnt_mux = 39),
>
> + /* EMMC2 clock (only available for BCM2711) */
> + [BCM2711_CLOCK_EMMC2] = REGISTER_PER_CLK(
> + SOC_BCM2711,
> + .name = "emmc2",
> + .ctl_reg = CM_EMMC2CTL,
> + .div_reg = CM_EMMC2DIV,
> + .int_bits = 4,
> + .frac_bits = 8,
> + .tcnt_mux = 42),
> +
> /* General purpose (GPIO) clocks */
> [BCM2835_CLOCK_GP0] = REGISTER_PER_CLK(
> SOC_ALL,
> @@ -2238,8 +2251,13 @@ static const struct cprman_plat_data cprman_bcm2835_plat_data = {
> .soc = SOC_BCM2835,
> };
>
> +static const struct cprman_plat_data cprman_bcm2711_plat_data = {
> + .soc = SOC_BCM2711,
> +};
> +
> static const struct of_device_id bcm2835_clk_of_match[] = {
> { .compatible = "brcm,bcm2835-cprman", .data = &cprman_bcm2835_plat_data },
> + { .compatible = "brcm,bcm2711-cprman", .data = &cprman_bcm2711_plat_data },
Because the RPi4 FW uses bcm2838-cprman as compatible, we will need to add this
here as well.
Regards,
Matthias
> {}
> };
> MODULE_DEVICE_TABLE(of, bcm2835_clk_of_match);
> --
> 2.7.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH V2 05/13] clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support
2019-09-12 17:24 ` Matthias Brugger
@ 2019-09-12 18:52 ` Eric Anholt
2019-09-13 1:20 ` Stefan Wahren
0 siblings, 1 reply; 31+ messages in thread
From: Eric Anholt @ 2019-09-12 18:52 UTC (permalink / raw)
To: Matthias Brugger, Stefan Wahren, Florian Fainelli, Ray Jui,
Scott Branden, Wolfram Sang, Rob Herring, Mark Rutland,
Michael Turquette, Stephen Boyd
Cc: devicetree, bcm-kernel-feedback-list, linux-i2c, linux-clk,
linux-arm-kernel, linux-rpi-kernel
[-- Attachment #1.1: Type: text/plain, Size: 2565 bytes --]
Matthias Brugger <matthias.bgg@gmail.com> writes:
> On 13/08/2019 18:20, Stefan Wahren wrote:
>> The new BCM2711 supports an additional clock for the emmc2 block.
>> So add a new compatible and register this clock only for BCM2711.
>>
>> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
>> Reviewed-by: Matthias Brugger <mbrugger@suse.com>
>> Acked-by: Eric Anholt <eric@anholt.net>
>> ---
>> drivers/clk/bcm/clk-bcm2835.c | 20 +++++++++++++++++++-
>> 1 file changed, 19 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
>> index 21cd952..fdf672a 100644
>> --- a/drivers/clk/bcm/clk-bcm2835.c
>> +++ b/drivers/clk/bcm/clk-bcm2835.c
>> @@ -114,6 +114,8 @@
>> #define CM_AVEODIV 0x1bc
>> #define CM_EMMCCTL 0x1c0
>> #define CM_EMMCDIV 0x1c4
>> +#define CM_EMMC2CTL 0x1d0
>> +#define CM_EMMC2DIV 0x1d4
>>
>> /* General bits for the CM_*CTL regs */
>> # define CM_ENABLE BIT(4)
>> @@ -290,7 +292,8 @@
>> #define BCM2835_MAX_FB_RATE 1750000000u
>>
>> #define SOC_BCM2835 BIT(0)
>> -#define SOC_ALL (SOC_BCM2835)
>> +#define SOC_BCM2711 BIT(1)
>> +#define SOC_ALL (SOC_BCM2835 | SOC_BCM2711)
>>
>> /*
>> * Names of clocks used within the driver that need to be replaced
>> @@ -2003,6 +2006,16 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
>> .frac_bits = 8,
>> .tcnt_mux = 39),
>>
>> + /* EMMC2 clock (only available for BCM2711) */
>> + [BCM2711_CLOCK_EMMC2] = REGISTER_PER_CLK(
>> + SOC_BCM2711,
>> + .name = "emmc2",
>> + .ctl_reg = CM_EMMC2CTL,
>> + .div_reg = CM_EMMC2DIV,
>> + .int_bits = 4,
>> + .frac_bits = 8,
>> + .tcnt_mux = 42),
>> +
>> /* General purpose (GPIO) clocks */
>> [BCM2835_CLOCK_GP0] = REGISTER_PER_CLK(
>> SOC_ALL,
>> @@ -2238,8 +2251,13 @@ static const struct cprman_plat_data cprman_bcm2835_plat_data = {
>> .soc = SOC_BCM2835,
>> };
>>
>> +static const struct cprman_plat_data cprman_bcm2711_plat_data = {
>> + .soc = SOC_BCM2711,
>> +};
>> +
>> static const struct of_device_id bcm2835_clk_of_match[] = {
>> { .compatible = "brcm,bcm2835-cprman", .data = &cprman_bcm2835_plat_data },
>> + { .compatible = "brcm,bcm2711-cprman", .data = &cprman_bcm2711_plat_data },
>
> Because the RPi4 FW uses bcm2838-cprman as compatible, we will need to add this
> here as well.
Upstream has not committed to backwards compat with Pi's firmware. That
makes the ABI requirement we get held to for upstream's DT absurd, but
that's the state of things.
[-- Attachment #1.2: signature.asc --]
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^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH V2 05/13] clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support
2019-09-12 18:52 ` Eric Anholt
@ 2019-09-13 1:20 ` Stefan Wahren
2019-09-13 7:13 ` Matthias Brugger
0 siblings, 1 reply; 31+ messages in thread
From: Stefan Wahren @ 2019-09-13 1:20 UTC (permalink / raw)
To: Eric Anholt, Matthias Brugger, Florian Fainelli, Ray Jui,
Scott Branden, Wolfram Sang, Rob Herring, Mark Rutland,
Michael Turquette, Stephen Boyd
Cc: devicetree, bcm-kernel-feedback-list, linux-i2c, linux-clk,
linux-arm-kernel, linux-rpi-kernel
Am 12.09.19 um 20:52 schrieb Eric Anholt:
> Matthias Brugger <matthias.bgg@gmail.com> writes:
>
>> On 13/08/2019 18:20, Stefan Wahren wrote:
>>> The new BCM2711 supports an additional clock for the emmc2 block.
>>> So add a new compatible and register this clock only for BCM2711.
>>>
>>> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
>>> Reviewed-by: Matthias Brugger <mbrugger@suse.com>
>>> Acked-by: Eric Anholt <eric@anholt.net>
>>> ---
>>> drivers/clk/bcm/clk-bcm2835.c | 20 +++++++++++++++++++-
>>> 1 file changed, 19 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
>>> index 21cd952..fdf672a 100644
>>> --- a/drivers/clk/bcm/clk-bcm2835.c
>>> +++ b/drivers/clk/bcm/clk-bcm2835.c
>>> @@ -114,6 +114,8 @@
>>> #define CM_AVEODIV 0x1bc
>>> #define CM_EMMCCTL 0x1c0
>>> #define CM_EMMCDIV 0x1c4
>>> +#define CM_EMMC2CTL 0x1d0
>>> +#define CM_EMMC2DIV 0x1d4
>>>
>>> /* General bits for the CM_*CTL regs */
>>> # define CM_ENABLE BIT(4)
>>> @@ -290,7 +292,8 @@
>>> #define BCM2835_MAX_FB_RATE 1750000000u
>>>
>>> #define SOC_BCM2835 BIT(0)
>>> -#define SOC_ALL (SOC_BCM2835)
>>> +#define SOC_BCM2711 BIT(1)
>>> +#define SOC_ALL (SOC_BCM2835 | SOC_BCM2711)
>>>
>>> /*
>>> * Names of clocks used within the driver that need to be replaced
>>> @@ -2003,6 +2006,16 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
>>> .frac_bits = 8,
>>> .tcnt_mux = 39),
>>>
>>> + /* EMMC2 clock (only available for BCM2711) */
>>> + [BCM2711_CLOCK_EMMC2] = REGISTER_PER_CLK(
>>> + SOC_BCM2711,
>>> + .name = "emmc2",
>>> + .ctl_reg = CM_EMMC2CTL,
>>> + .div_reg = CM_EMMC2DIV,
>>> + .int_bits = 4,
>>> + .frac_bits = 8,
>>> + .tcnt_mux = 42),
>>> +
>>> /* General purpose (GPIO) clocks */
>>> [BCM2835_CLOCK_GP0] = REGISTER_PER_CLK(
>>> SOC_ALL,
>>> @@ -2238,8 +2251,13 @@ static const struct cprman_plat_data cprman_bcm2835_plat_data = {
>>> .soc = SOC_BCM2835,
>>> };
>>>
>>> +static const struct cprman_plat_data cprman_bcm2711_plat_data = {
>>> + .soc = SOC_BCM2711,
>>> +};
>>> +
>>> static const struct of_device_id bcm2835_clk_of_match[] = {
>>> { .compatible = "brcm,bcm2835-cprman", .data = &cprman_bcm2835_plat_data },
>>> + { .compatible = "brcm,bcm2711-cprman", .data = &cprman_bcm2711_plat_data },
>> Because the RPi4 FW uses bcm2838-cprman as compatible, we will need to add this
>> here as well.
> Upstream has not committed to backwards compat with Pi's firmware. That
> makes the ABI requirement we get held to for upstream's DT absurd, but
> that's the state of things.
We also learned from past, that's not possible to keep things downstream
compatible. As soon as a binding is not accepted, this wont work
anymore. A lot of the downstream stuff is hacky.
For example yesterday, i learned that the thermal node is broken
(register is part of ring oscillator block). So do we really want to be
compatible with a hack? I would say: No
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^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH V2 05/13] clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support
2019-09-13 1:20 ` Stefan Wahren
@ 2019-09-13 7:13 ` Matthias Brugger
2019-09-13 23:02 ` Florian Fainelli
0 siblings, 1 reply; 31+ messages in thread
From: Matthias Brugger @ 2019-09-13 7:13 UTC (permalink / raw)
To: Stefan Wahren, Eric Anholt, Florian Fainelli, Ray Jui,
Scott Branden, Wolfram Sang, Rob Herring, Mark Rutland,
Michael Turquette, Stephen Boyd
Cc: devicetree, bcm-kernel-feedback-list, linux-i2c, linux-clk,
linux-arm-kernel, linux-rpi-kernel
On 13/09/2019 03:20, Stefan Wahren wrote:
> Am 12.09.19 um 20:52 schrieb Eric Anholt:
>> Matthias Brugger <matthias.bgg@gmail.com> writes:
>>
>>> On 13/08/2019 18:20, Stefan Wahren wrote:
>>>> The new BCM2711 supports an additional clock for the emmc2 block.
>>>> So add a new compatible and register this clock only for BCM2711.
>>>>
>>>> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
>>>> Reviewed-by: Matthias Brugger <mbrugger@suse.com>
>>>> Acked-by: Eric Anholt <eric@anholt.net>
>>>> ---
>>>> drivers/clk/bcm/clk-bcm2835.c | 20 +++++++++++++++++++-
>>>> 1 file changed, 19 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
>>>> index 21cd952..fdf672a 100644
>>>> --- a/drivers/clk/bcm/clk-bcm2835.c
>>>> +++ b/drivers/clk/bcm/clk-bcm2835.c
>>>> @@ -114,6 +114,8 @@
>>>> #define CM_AVEODIV 0x1bc
>>>> #define CM_EMMCCTL 0x1c0
>>>> #define CM_EMMCDIV 0x1c4
>>>> +#define CM_EMMC2CTL 0x1d0
>>>> +#define CM_EMMC2DIV 0x1d4
>>>>
>>>> /* General bits for the CM_*CTL regs */
>>>> # define CM_ENABLE BIT(4)
>>>> @@ -290,7 +292,8 @@
>>>> #define BCM2835_MAX_FB_RATE 1750000000u
>>>>
>>>> #define SOC_BCM2835 BIT(0)
>>>> -#define SOC_ALL (SOC_BCM2835)
>>>> +#define SOC_BCM2711 BIT(1)
>>>> +#define SOC_ALL (SOC_BCM2835 | SOC_BCM2711)
>>>>
>>>> /*
>>>> * Names of clocks used within the driver that need to be replaced
>>>> @@ -2003,6 +2006,16 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
>>>> .frac_bits = 8,
>>>> .tcnt_mux = 39),
>>>>
>>>> + /* EMMC2 clock (only available for BCM2711) */
>>>> + [BCM2711_CLOCK_EMMC2] = REGISTER_PER_CLK(
>>>> + SOC_BCM2711,
>>>> + .name = "emmc2",
>>>> + .ctl_reg = CM_EMMC2CTL,
>>>> + .div_reg = CM_EMMC2DIV,
>>>> + .int_bits = 4,
>>>> + .frac_bits = 8,
>>>> + .tcnt_mux = 42),
>>>> +
>>>> /* General purpose (GPIO) clocks */
>>>> [BCM2835_CLOCK_GP0] = REGISTER_PER_CLK(
>>>> SOC_ALL,
>>>> @@ -2238,8 +2251,13 @@ static const struct cprman_plat_data cprman_bcm2835_plat_data = {
>>>> .soc = SOC_BCM2835,
>>>> };
>>>>
>>>> +static const struct cprman_plat_data cprman_bcm2711_plat_data = {
>>>> + .soc = SOC_BCM2711,
>>>> +};
>>>> +
>>>> static const struct of_device_id bcm2835_clk_of_match[] = {
>>>> { .compatible = "brcm,bcm2835-cprman", .data = &cprman_bcm2835_plat_data },
>>>> + { .compatible = "brcm,bcm2711-cprman", .data = &cprman_bcm2711_plat_data },
>>> Because the RPi4 FW uses bcm2838-cprman as compatible, we will need to add this
>>> here as well.
>> Upstream has not committed to backwards compat with Pi's firmware. That
>> makes the ABI requirement we get held to for upstream's DT absurd, but
>> that's the state of things.
>
> We also learned from past, that's not possible to keep things downstream
> compatible. As soon as a binding is not accepted, this wont work
> anymore. A lot of the downstream stuff is hacky.
>
> For example yesterday, i learned that the thermal node is broken
> (register is part of ring oscillator block). So do we really want to be
> compatible with a hack? I would say: No
>
There is always the possibility to fix this in the FW, which in many cases will
be trivial.
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^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH V2 05/13] clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support
2019-09-13 7:13 ` Matthias Brugger
@ 2019-09-13 23:02 ` Florian Fainelli
0 siblings, 0 replies; 31+ messages in thread
From: Florian Fainelli @ 2019-09-13 23:02 UTC (permalink / raw)
To: Matthias Brugger, Stefan Wahren, Eric Anholt, Ray Jui,
Scott Branden, Wolfram Sang, Rob Herring, Mark Rutland,
Michael Turquette, Stephen Boyd
Cc: devicetree, bcm-kernel-feedback-list, linux-i2c, linux-clk,
linux-arm-kernel, linux-rpi-kernel
On 9/13/19 12:13 AM, Matthias Brugger wrote:
>
>
> On 13/09/2019 03:20, Stefan Wahren wrote:
>> Am 12.09.19 um 20:52 schrieb Eric Anholt:
>>> Matthias Brugger <matthias.bgg@gmail.com> writes:
>>>
>>>> On 13/08/2019 18:20, Stefan Wahren wrote:
>>>>> The new BCM2711 supports an additional clock for the emmc2 block.
>>>>> So add a new compatible and register this clock only for BCM2711.
>>>>>
>>>>> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
>>>>> Reviewed-by: Matthias Brugger <mbrugger@suse.com>
>>>>> Acked-by: Eric Anholt <eric@anholt.net>
>>>>> ---
>>>>> drivers/clk/bcm/clk-bcm2835.c | 20 +++++++++++++++++++-
>>>>> 1 file changed, 19 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
>>>>> index 21cd952..fdf672a 100644
>>>>> --- a/drivers/clk/bcm/clk-bcm2835.c
>>>>> +++ b/drivers/clk/bcm/clk-bcm2835.c
>>>>> @@ -114,6 +114,8 @@
>>>>> #define CM_AVEODIV 0x1bc
>>>>> #define CM_EMMCCTL 0x1c0
>>>>> #define CM_EMMCDIV 0x1c4
>>>>> +#define CM_EMMC2CTL 0x1d0
>>>>> +#define CM_EMMC2DIV 0x1d4
>>>>>
>>>>> /* General bits for the CM_*CTL regs */
>>>>> # define CM_ENABLE BIT(4)
>>>>> @@ -290,7 +292,8 @@
>>>>> #define BCM2835_MAX_FB_RATE 1750000000u
>>>>>
>>>>> #define SOC_BCM2835 BIT(0)
>>>>> -#define SOC_ALL (SOC_BCM2835)
>>>>> +#define SOC_BCM2711 BIT(1)
>>>>> +#define SOC_ALL (SOC_BCM2835 | SOC_BCM2711)
>>>>>
>>>>> /*
>>>>> * Names of clocks used within the driver that need to be replaced
>>>>> @@ -2003,6 +2006,16 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
>>>>> .frac_bits = 8,
>>>>> .tcnt_mux = 39),
>>>>>
>>>>> + /* EMMC2 clock (only available for BCM2711) */
>>>>> + [BCM2711_CLOCK_EMMC2] = REGISTER_PER_CLK(
>>>>> + SOC_BCM2711,
>>>>> + .name = "emmc2",
>>>>> + .ctl_reg = CM_EMMC2CTL,
>>>>> + .div_reg = CM_EMMC2DIV,
>>>>> + .int_bits = 4,
>>>>> + .frac_bits = 8,
>>>>> + .tcnt_mux = 42),
>>>>> +
>>>>> /* General purpose (GPIO) clocks */
>>>>> [BCM2835_CLOCK_GP0] = REGISTER_PER_CLK(
>>>>> SOC_ALL,
>>>>> @@ -2238,8 +2251,13 @@ static const struct cprman_plat_data cprman_bcm2835_plat_data = {
>>>>> .soc = SOC_BCM2835,
>>>>> };
>>>>>
>>>>> +static const struct cprman_plat_data cprman_bcm2711_plat_data = {
>>>>> + .soc = SOC_BCM2711,
>>>>> +};
>>>>> +
>>>>> static const struct of_device_id bcm2835_clk_of_match[] = {
>>>>> { .compatible = "brcm,bcm2835-cprman", .data = &cprman_bcm2835_plat_data },
>>>>> + { .compatible = "brcm,bcm2711-cprman", .data = &cprman_bcm2711_plat_data },
>>>> Because the RPi4 FW uses bcm2838-cprman as compatible, we will need to add this
>>>> here as well.
>>> Upstream has not committed to backwards compat with Pi's firmware. That
>>> makes the ABI requirement we get held to for upstream's DT absurd, but
>>> that's the state of things.
>>
>> We also learned from past, that's not possible to keep things downstream
>> compatible. As soon as a binding is not accepted, this wont work
>> anymore. A lot of the downstream stuff is hacky.
>>
>> For example yesterday, i learned that the thermal node is broken
>> (register is part of ring oscillator block). So do we really want to be
>> compatible with a hack? I would say: No
>>
>
> There is always the possibility to fix this in the FW, which in many cases will
> be trivial.
In many cases, the firmware can certainly be changed to support both
downstream and upstream properties, as long as the layout is not
fundamentally incompatible obviously. If this is just a game of
compatible strings, both can be provided and it should not cause any
issues as long as you are not mixing downstream and upstream drivers for
the same purpose.
--
Florian
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^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH V2 06/13] clk: bcm2835: Mark PLLD_PER as CRITICAL
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
` (4 preceding siblings ...)
2019-08-13 16:20 ` [PATCH V2 05/13] clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support Stefan Wahren
@ 2019-08-13 16:20 ` Stefan Wahren
2019-08-16 17:39 ` Stephen Boyd
2019-08-13 16:20 ` [PATCH V2 07/13] dt-bindings: i2c: bcm2835: Add brcm, bcm2711 compatible Stefan Wahren
` (7 subsequent siblings)
13 siblings, 1 reply; 31+ messages in thread
From: Stefan Wahren @ 2019-08-13 16:20 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
The VPU firmware assume that the PLLD_PER isn't modified by the ARM core.
Otherwise this could cause firmware lookups. So mark the clock as critical
to avoid this.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
---
drivers/clk/bcm/clk-bcm2835.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index fdf672a..b62052e 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1785,7 +1785,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.load_mask = CM_PLLD_LOADPER,
.hold_mask = CM_PLLD_HOLDPER,
.fixed_divider = 1,
- .flags = CLK_SET_RATE_PARENT),
+ .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
[BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV(
SOC_ALL,
.name = "plld_dsi0",
--
2.7.4
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^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH V2 06/13] clk: bcm2835: Mark PLLD_PER as CRITICAL
2019-08-13 16:20 ` [PATCH V2 06/13] clk: bcm2835: Mark PLLD_PER as CRITICAL Stefan Wahren
@ 2019-08-16 17:39 ` Stephen Boyd
0 siblings, 0 replies; 31+ messages in thread
From: Stephen Boyd @ 2019-08-16 17:39 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Mark Rutland, Michael Turquette,
Ray Jui, Rob Herring, Scott Branden, Stefan Wahren, Wolfram Sang
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
Quoting Stefan Wahren (2019-08-13 09:20:41)
> The VPU firmware assume that the PLLD_PER isn't modified by the ARM core.
> Otherwise this could cause firmware lookups. So mark the clock as critical
> to avoid this.
>
> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
> ---
> drivers/clk/bcm/clk-bcm2835.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
> index fdf672a..b62052e 100644
> --- a/drivers/clk/bcm/clk-bcm2835.c
> +++ b/drivers/clk/bcm/clk-bcm2835.c
> @@ -1785,7 +1785,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
> .load_mask = CM_PLLD_LOADPER,
> .hold_mask = CM_PLLD_HOLDPER,
> .fixed_divider = 1,
> - .flags = CLK_SET_RATE_PARENT),
> + .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
Please add a comment in the code to the effect that is in the commit
text so we don't have to dig through commits to figure out why this
special CLK_IS_CRITICAL flag is here.
> [BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV(
> SOC_ALL,
> .name = "plld_dsi0",
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^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH V2 07/13] dt-bindings: i2c: bcm2835: Add brcm, bcm2711 compatible
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
` (5 preceding siblings ...)
2019-08-13 16:20 ` [PATCH V2 06/13] clk: bcm2835: Mark PLLD_PER as CRITICAL Stefan Wahren
@ 2019-08-13 16:20 ` Stefan Wahren
2019-08-27 16:00 ` [PATCH V2 07/13] dt-bindings: i2c: bcm2835: Add brcm,bcm2711 compatible Rob Herring
2019-08-13 16:20 ` [PATCH V2 08/13] i2c: bcm2835: Avoid clk stretch quirk for BCM2711 Stefan Wahren
` (6 subsequent siblings)
13 siblings, 1 reply; 31+ messages in thread
From: Stefan Wahren @ 2019-08-13 16:20 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
Add a new compatible for the BCM2711, which hasn't the clock stretch bug.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
---
Documentation/devicetree/bindings/i2c/brcm,bcm2835-i2c.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/i2c/brcm,bcm2835-i2c.txt b/Documentation/devicetree/bindings/i2c/brcm,bcm2835-i2c.txt
index e9de375..c9a6587 100644
--- a/Documentation/devicetree/bindings/i2c/brcm,bcm2835-i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/brcm,bcm2835-i2c.txt
@@ -1,7 +1,9 @@
Broadcom BCM2835 I2C controller
Required properties:
-- compatible : Should be "brcm,bcm2835-i2c".
+- compatible : Should be one of:
+ "brcm,bcm2711-i2c"
+ "brcm,bcm2835-i2c"
- reg: Should contain register location and length.
- interrupts: Should contain interrupt.
- clocks : The clock feeding the I2C controller.
--
2.7.4
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^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH V2 07/13] dt-bindings: i2c: bcm2835: Add brcm,bcm2711 compatible
2019-08-13 16:20 ` [PATCH V2 07/13] dt-bindings: i2c: bcm2835: Add brcm, bcm2711 compatible Stefan Wahren
@ 2019-08-27 16:00 ` Rob Herring
0 siblings, 0 replies; 31+ messages in thread
From: Rob Herring @ 2019-08-27 16:00 UTC (permalink / raw)
To: Stefan Wahren
Cc: devicetree, Florian Fainelli, Scott Branden, Wolfram Sang,
Ray Jui, Stefan Wahren, Eric Anholt, bcm-kernel-feedback-list,
linux-i2c, linux-clk, linux-arm-kernel, linux-rpi-kernel
On Tue, 13 Aug 2019 18:20:42 +0200, Stefan Wahren wrote:
> Add a new compatible for the BCM2711, which hasn't the clock stretch bug.
>
> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
> ---
> Documentation/devicetree/bindings/i2c/brcm,bcm2835-i2c.txt | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
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^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH V2 08/13] i2c: bcm2835: Avoid clk stretch quirk for BCM2711
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
` (6 preceding siblings ...)
2019-08-13 16:20 ` [PATCH V2 07/13] dt-bindings: i2c: bcm2835: Add brcm, bcm2711 compatible Stefan Wahren
@ 2019-08-13 16:20 ` Stefan Wahren
2019-08-14 19:36 ` Wolfram Sang
2019-08-13 16:20 ` [PATCH V2 09/13] dt-bindings: arm: Convert BCM2835 board/soc bindings to json-schema Stefan Wahren
` (5 subsequent siblings)
13 siblings, 1 reply; 31+ messages in thread
From: Stefan Wahren @ 2019-08-13 16:20 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
The I2C block on the BCM2711 isn't affected by the clock stretching bug.
So there is no need to apply the corresponding quirk.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
---
drivers/i2c/busses/i2c-bcm2835.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index 67752f7..340da70 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -12,6 +12,7 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
@@ -50,6 +51,9 @@
#define BCM2835_I2C_CDIV_MIN 0x0002
#define BCM2835_I2C_CDIV_MAX 0xFFFE
+#define NO_STRETCH_BUG false
+#define STRETCH_BUG true
+
struct bcm2835_i2c_dev {
struct device *dev;
void __iomem *regs;
@@ -389,7 +393,7 @@ static const struct i2c_algorithm bcm2835_i2c_algo = {
};
/*
- * This HW was reported to have problems with clock stretching:
+ * The BCM2835 was reported to have problems with clock stretching:
* http://www.advamation.com/knowhow/raspberrypi/rpi-i2c-bug.html
* https://www.raspberrypi.org/forums/viewtopic.php?p=146272
*/
@@ -406,6 +410,9 @@ static int bcm2835_i2c_probe(struct platform_device *pdev)
struct clk *bus_clk;
struct clk *mclk;
u32 bus_clk_rate;
+ bool clk_stretch_bug;
+
+ clk_stretch_bug = (bool)of_device_get_match_data(&pdev->dev);
i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
if (!i2c_dev)
@@ -475,7 +482,9 @@ static int bcm2835_i2c_probe(struct platform_device *pdev)
adap->algo = &bcm2835_i2c_algo;
adap->dev.parent = &pdev->dev;
adap->dev.of_node = pdev->dev.of_node;
- adap->quirks = &bcm2835_i2c_quirks;
+
+ if (clk_stretch_bug)
+ adap->quirks = &bcm2835_i2c_quirks;
bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, 0);
@@ -501,7 +510,8 @@ static int bcm2835_i2c_remove(struct platform_device *pdev)
}
static const struct of_device_id bcm2835_i2c_of_match[] = {
- { .compatible = "brcm,bcm2835-i2c" },
+ { .compatible = "brcm,bcm2711-i2c", .data = (void *)NO_STRETCH_BUG },
+ { .compatible = "brcm,bcm2835-i2c", .data = (void *)STRETCH_BUG },
{},
};
MODULE_DEVICE_TABLE(of, bcm2835_i2c_of_match);
--
2.7.4
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^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH V2 08/13] i2c: bcm2835: Avoid clk stretch quirk for BCM2711
2019-08-13 16:20 ` [PATCH V2 08/13] i2c: bcm2835: Avoid clk stretch quirk for BCM2711 Stefan Wahren
@ 2019-08-14 19:36 ` Wolfram Sang
2019-08-17 7:32 ` Stefan Wahren
0 siblings, 1 reply; 31+ messages in thread
From: Wolfram Sang @ 2019-08-14 19:36 UTC (permalink / raw)
To: Stefan Wahren
Cc: Mark Rutland, devicetree, Florian Fainelli, Scott Branden,
Stephen Boyd, Ray Jui, Michael Turquette, Eric Anholt,
Rob Herring, bcm-kernel-feedback-list, linux-i2c, linux-clk,
linux-arm-kernel, linux-rpi-kernel
[-- Attachment #1.1: Type: text/plain, Size: 418 bytes --]
> static const struct of_device_id bcm2835_i2c_of_match[] = {
> - { .compatible = "brcm,bcm2835-i2c" },
> + { .compatible = "brcm,bcm2711-i2c", .data = (void *)NO_STRETCH_BUG },
> + { .compatible = "brcm,bcm2835-i2c", .data = (void *)STRETCH_BUG },
What about simply putting a pointer to the quirks data (or NULL) as
match_data? Then the code should be:
adap->quirks = (cast)of_device_get_match_data(&pdev->dev);
[-- Attachment #1.2: signature.asc --]
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[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
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^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH V2 08/13] i2c: bcm2835: Avoid clk stretch quirk for BCM2711
2019-08-14 19:36 ` Wolfram Sang
@ 2019-08-17 7:32 ` Stefan Wahren
2019-08-17 8:30 ` Wolfram Sang
0 siblings, 1 reply; 31+ messages in thread
From: Stefan Wahren @ 2019-08-17 7:32 UTC (permalink / raw)
To: Wolfram Sang
Cc: Mark Rutland, devicetree, Florian Fainelli, Scott Branden,
Stephen Boyd, Ray Jui, Michael Turquette, Eric Anholt,
Rob Herring, bcm-kernel-feedback-list, linux-i2c, linux-clk,
linux-arm-kernel, linux-rpi-kernel
Hi Wolfram,
Am 14.08.19 um 21:36 schrieb Wolfram Sang:
>> static const struct of_device_id bcm2835_i2c_of_match[] = {
>> - { .compatible = "brcm,bcm2835-i2c" },
>> + { .compatible = "brcm,bcm2711-i2c", .data = (void *)NO_STRETCH_BUG },
>> + { .compatible = "brcm,bcm2835-i2c", .data = (void *)STRETCH_BUG },
> What about simply putting a pointer to the quirks data (or NULL) as
> match_data? Then the code should be:
>
> adap->quirks = (cast)of_device_get_match_data(&pdev->dev);
quirks = (const struct i2c_adapter_quirks *)of_device_get_match_data(dev);
would hit the line limit. Do you insists on the cast, because it's
actually not required?
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^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH V2 08/13] i2c: bcm2835: Avoid clk stretch quirk for BCM2711
2019-08-17 7:32 ` Stefan Wahren
@ 2019-08-17 8:30 ` Wolfram Sang
0 siblings, 0 replies; 31+ messages in thread
From: Wolfram Sang @ 2019-08-17 8:30 UTC (permalink / raw)
To: Stefan Wahren
Cc: Mark Rutland, devicetree, Florian Fainelli, Scott Branden,
Stephen Boyd, Ray Jui, Michael Turquette, Eric Anholt,
Rob Herring, bcm-kernel-feedback-list, linux-i2c, linux-clk,
linux-arm-kernel, linux-rpi-kernel
[-- Attachment #1.1: Type: text/plain, Size: 269 bytes --]
> quirks = (const struct i2c_adapter_quirks *)of_device_get_match_data(dev);
>
> would hit the line limit. Do you insists on the cast, because it's
> actually not required?
Not at all, I mixed sth up and forgot that of_device_get_match_data
returns void*.
[-- Attachment #1.2: signature.asc --]
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^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH V2 09/13] dt-bindings: arm: Convert BCM2835 board/soc bindings to json-schema
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
` (7 preceding siblings ...)
2019-08-13 16:20 ` [PATCH V2 08/13] i2c: bcm2835: Avoid clk stretch quirk for BCM2711 Stefan Wahren
@ 2019-08-13 16:20 ` Stefan Wahren
2019-08-13 17:22 ` Rob Herring
2019-08-13 16:20 ` [PATCH V2 10/13] dt-bindings: arm: bcm2835: Add Raspberry Pi 4 to DT schema Stefan Wahren
` (4 subsequent siblings)
13 siblings, 1 reply; 31+ messages in thread
From: Stefan Wahren @ 2019-08-13 16:20 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
Convert the BCM2835/6/7 SoC bindings to DT schema format using json-schema.
All the other Broadcom boards are maintained by Florian Fainelli.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Eric Anholt <eric@anholt.net>
---
.../devicetree/bindings/arm/bcm/bcm2835.yaml | 46 +++++++++++++++
.../devicetree/bindings/arm/bcm/brcm,bcm2835.txt | 67 ----------------------
2 files changed, 46 insertions(+), 67 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
new file mode 100644
index 0000000..1a4be26
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/bcm/bcm2835.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM2711/BCM2835 Platforms Device Tree Bindings
+
+maintainers:
+ - Eric Anholt <eric@anholt.net>
+ - Stefan Wahren <wahrenst@gmx.net>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - description: BCM2835 based Boards
+ items:
+ - enum:
+ - raspberrypi,model-a
+ - raspberrypi,model-a-plus
+ - raspberrypi,model-b
+ - raspberrypi,model-b-i2c0 # Raspberry Pi Model B (no P5)
+ - raspberrypi,model-b-rev2
+ - raspberrypi,model-b-plus
+ - raspberrypi,compute-module
+ - raspberrypi,model-zero
+ - raspberrypi,model-zero-w
+ - const: brcm,bcm2835
+
+ - description: BCM2836 based Boards
+ items:
+ - enum:
+ - raspberrypi,2-model-b
+
+ - description: BCM2837 based Boards
+ items:
+ - enum:
+ - raspberrypi,3-model-a-plus
+ - raspberrypi,3-model-b
+ - raspberrypi,3-model-b-plus
+ - raspberrypi,3-compute-module
+ - raspberrypi,3-compute-module-lite
+
+...
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
deleted file mode 100644
index 245328f..0000000
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
+++ /dev/null
@@ -1,67 +0,0 @@
-Broadcom BCM2835 device tree bindings
--------------------------------------------
-
-Raspberry Pi Model A
-Required root node properties:
-compatible = "raspberrypi,model-a", "brcm,bcm2835";
-
-Raspberry Pi Model A+
-Required root node properties:
-compatible = "raspberrypi,model-a-plus", "brcm,bcm2835";
-
-Raspberry Pi Model B
-Required root node properties:
-compatible = "raspberrypi,model-b", "brcm,bcm2835";
-
-Raspberry Pi Model B (no P5)
-early model B with I2C0 rather than I2C1 routed to the expansion header
-Required root node properties:
-compatible = "raspberrypi,model-b-i2c0", "brcm,bcm2835";
-
-Raspberry Pi Model B rev2
-Required root node properties:
-compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835";
-
-Raspberry Pi Model B+
-Required root node properties:
-compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
-
-Raspberry Pi 2 Model B
-Required root node properties:
-compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
-
-Raspberry Pi 3 Model A+
-Required root node properties:
-compatible = "raspberrypi,3-model-a-plus", "brcm,bcm2837";
-
-Raspberry Pi 3 Model B
-Required root node properties:
-compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
-
-Raspberry Pi 3 Model B+
-Required root node properties:
-compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
-
-Raspberry Pi Compute Module
-Required root node properties:
-compatible = "raspberrypi,compute-module", "brcm,bcm2835";
-
-Raspberry Pi Compute Module 3
-Required root node properties:
-compatible = "raspberrypi,3-compute-module", "brcm,bcm2837";
-
-Raspberry Pi Compute Module 3 Lite
-Required root node properties:
-compatible = "raspberrypi,3-compute-module-lite", "brcm,bcm2837";
-
-Raspberry Pi Zero
-Required root node properties:
-compatible = "raspberrypi,model-zero", "brcm,bcm2835";
-
-Raspberry Pi Zero W
-Required root node properties:
-compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
-
-Generic BCM2835 board
-Required root node properties:
-compatible = "brcm,bcm2835";
--
2.7.4
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^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH V2 09/13] dt-bindings: arm: Convert BCM2835 board/soc bindings to json-schema
2019-08-13 16:20 ` [PATCH V2 09/13] dt-bindings: arm: Convert BCM2835 board/soc bindings to json-schema Stefan Wahren
@ 2019-08-13 17:22 ` Rob Herring
2019-08-14 19:21 ` Stefan Wahren
0 siblings, 1 reply; 31+ messages in thread
From: Rob Herring @ 2019-08-13 17:22 UTC (permalink / raw)
To: Stefan Wahren
Cc: Mark Rutland, devicetree, Florian Fainelli, Scott Branden,
Wolfram Sang, Stephen Boyd, Ray Jui, Michael Turquette,
Eric Anholt, maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE,
Linux I2C, linux-clk,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:BROADCOM BCM2835 ARM ARCHITECTURE
On Tue, Aug 13, 2019 at 10:21 AM Stefan Wahren <wahrenst@gmx.net> wrote:
>
> Convert the BCM2835/6/7 SoC bindings to DT schema format using json-schema.
> All the other Broadcom boards are maintained by Florian Fainelli.
>
> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
> Acked-by: Eric Anholt <eric@anholt.net>
> ---
> .../devicetree/bindings/arm/bcm/bcm2835.yaml | 46 +++++++++++++++
> .../devicetree/bindings/arm/bcm/brcm,bcm2835.txt | 67 ----------------------
> 2 files changed, 46 insertions(+), 67 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
> delete mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
> new file mode 100644
> index 0000000..1a4be26
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/bcm/bcm2835.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Broadcom BCM2711/BCM2835 Platforms Device Tree Bindings
> +
> +maintainers:
> + - Eric Anholt <eric@anholt.net>
> + - Stefan Wahren <wahrenst@gmx.net>
> +
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + oneOf:
> + - description: BCM2835 based Boards
> + items:
> + - enum:
> + - raspberrypi,model-a
> + - raspberrypi,model-a-plus
> + - raspberrypi,model-b
> + - raspberrypi,model-b-i2c0 # Raspberry Pi Model B (no P5)
> + - raspberrypi,model-b-rev2
> + - raspberrypi,model-b-plus
> + - raspberrypi,compute-module
> + - raspberrypi,model-zero
> + - raspberrypi,model-zero-w
> + - const: brcm,bcm2835
> +
> + - description: BCM2836 based Boards
> + items:
> + - enum:
> + - raspberrypi,2-model-b
Don't you need brcm,bcm2836 here?
> +
> + - description: BCM2837 based Boards
> + items:
> + - enum:
> + - raspberrypi,3-model-a-plus
> + - raspberrypi,3-model-b
> + - raspberrypi,3-model-b-plus
> + - raspberrypi,3-compute-module
> + - raspberrypi,3-compute-module-lite
Don't you need brcm,bcm2837 here?
Please run 'dtbs_check' and make sure there aren't warnings (in the root node).
Rob
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH V2 09/13] dt-bindings: arm: Convert BCM2835 board/soc bindings to json-schema
2019-08-13 17:22 ` Rob Herring
@ 2019-08-14 19:21 ` Stefan Wahren
2019-08-14 23:06 ` Rob Herring
0 siblings, 1 reply; 31+ messages in thread
From: Stefan Wahren @ 2019-08-14 19:21 UTC (permalink / raw)
To: Rob Herring
Cc: Mark Rutland, devicetree, Florian Fainelli, Scott Branden,
Wolfram Sang, Stephen Boyd, Ray Jui, Michael Turquette,
Eric Anholt, maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE,
Linux I2C, linux-clk,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:BROADCOM BCM2835 ARM ARCHITECTURE
Hi Rob,
Am 13.08.19 um 19:22 schrieb Rob Herring:
> On Tue, Aug 13, 2019 at 10:21 AM Stefan Wahren <wahrenst@gmx.net> wrote:
>> Convert the BCM2835/6/7 SoC bindings to DT schema format using json-schema.
>> All the other Broadcom boards are maintained by Florian Fainelli.
>>
>> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
>> Acked-by: Eric Anholt <eric@anholt.net>
>> ---
>> .../devicetree/bindings/arm/bcm/bcm2835.yaml | 46 +++++++++++++++
>> .../devicetree/bindings/arm/bcm/brcm,bcm2835.txt | 67 ----------------------
>> 2 files changed, 46 insertions(+), 67 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
>> delete mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
>>
>> diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
>> new file mode 100644
>> index 0000000..1a4be26
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
>> @@ -0,0 +1,46 @@
>> +# SPDX-License-Identifier: GPL-2.0
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/arm/bcm/bcm2835.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Broadcom BCM2711/BCM2835 Platforms Device Tree Bindings
>> +
>> +maintainers:
>> + - Eric Anholt <eric@anholt.net>
>> + - Stefan Wahren <wahrenst@gmx.net>
>> +
>> +properties:
>> + $nodename:
>> + const: '/'
>> + compatible:
>> + oneOf:
>> + - description: BCM2835 based Boards
>> + items:
>> + - enum:
>> + - raspberrypi,model-a
>> + - raspberrypi,model-a-plus
>> + - raspberrypi,model-b
>> + - raspberrypi,model-b-i2c0 # Raspberry Pi Model B (no P5)
>> + - raspberrypi,model-b-rev2
>> + - raspberrypi,model-b-plus
>> + - raspberrypi,compute-module
>> + - raspberrypi,model-zero
>> + - raspberrypi,model-zero-w
>> + - const: brcm,bcm2835
>> +
>> + - description: BCM2836 based Boards
>> + items:
>> + - enum:
>> + - raspberrypi,2-model-b
> Don't you need brcm,bcm2836 here?
>
>> +
>> + - description: BCM2837 based Boards
>> + items:
>> + - enum:
>> + - raspberrypi,3-model-a-plus
>> + - raspberrypi,3-model-b
>> + - raspberrypi,3-model-b-plus
>> + - raspberrypi,3-compute-module
>> + - raspberrypi,3-compute-module-lite
> Don't you need brcm,bcm2837 here?
>
> Please run 'dtbs_check' and make sure there aren't warnings (in the root node).
thanks, after addressing your comments the root node doesn't have
warnings anymore.
Beside that there a lot of other warnings:
DTC arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml
CHECK arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
arm-pmu: compatible: ['arm,cortex-a72-pmu', 'arm,armv8-pmuv3'] is too long
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
arm-pmu: compatible: Additional items are not allowed ('arm,armv8-pmuv3'
was unexpected)
I think the schema is a little bit too strict by prohibit a fallback
compatible.
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
serial@7e201800: Additional properties are not allowed
('arm,primecell-periphid' was unexpected)
In the old txt version this was an allowed property.
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
firmware: $nodename:0: 'firmware' does not match
'^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
firmware: '#address-cells' is a required property
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
firmware: '#size-cells' is a required property
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
firmware: 'ranges' is a required property
I suggest to fix this by removing the "simple-bus".
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
serial@7e201a00: Additional properties are not allowed
('arm,primecell-periphid' was unexpected)
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
gpio@7e200000: 'pinctrl-0' is a dependency of 'pinctrl-names'
This could be fixed by removing pinctrl-names.
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
serial@7e201600: Additional properties are not allowed
('arm,primecell-periphid' was unexpected)
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
gic400@40041000: $nodename:0: 'gic400@40041000' does not match
'^interrupt-controller(@[0-9a-f,]+)*$'
I will rename gic400 to interrupt-controller.
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
serial@7e201400: Additional properties are not allowed
('arm,primecell-periphid' was unexpected)
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
serial@7e201000: compatible: ['brcm,bcm2835-pl011', 'arm,pl011',
'arm,primecell'] is not valid under any of the given schemas
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
serial@7e201000: Additional properties are not allowed ('bluetooth',
'arm,primecell-periphid' were unexpected)
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
sd_io_1v8_reg: states:0: [1800000, 1, 3300000, 0] is too long
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
sd_io_1v8_reg: states:0: Additional items are not allowed (3300000, 0
were unexpected)
No idea what is wrong here
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml: clocks:
#size-cells:0:0: 0 is not one of [1, 2]
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml: clocks:
$nodename:0: 'clocks' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml: clocks:
clock@3:reg:0: [3] is too short
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml: clocks:
clock@4:reg:0: [4] is too short
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml: clocks:
'ranges' is a required property
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
clock@3: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'
/home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
clock@4: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'
This could be fixed by avoiding a simple-bus for the fixed clocks.
Stefan
>
> Rob
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH V2 09/13] dt-bindings: arm: Convert BCM2835 board/soc bindings to json-schema
2019-08-14 19:21 ` Stefan Wahren
@ 2019-08-14 23:06 ` Rob Herring
0 siblings, 0 replies; 31+ messages in thread
From: Rob Herring @ 2019-08-14 23:06 UTC (permalink / raw)
To: Stefan Wahren
Cc: Mark Rutland, devicetree, Florian Fainelli, Scott Branden,
Wolfram Sang, Stephen Boyd, Ray Jui, Michael Turquette,
Eric Anholt, maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE,
Linux I2C, linux-clk,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:BROADCOM BCM2835 ARM ARCHITECTURE
On Wed, Aug 14, 2019 at 1:21 PM Stefan Wahren <wahrenst@gmx.net> wrote:
>
> Hi Rob,
>
> Am 13.08.19 um 19:22 schrieb Rob Herring:
> > On Tue, Aug 13, 2019 at 10:21 AM Stefan Wahren <wahrenst@gmx.net> wrote:
> >> Convert the BCM2835/6/7 SoC bindings to DT schema format using json-schema.
> >> All the other Broadcom boards are maintained by Florian Fainelli.
> >>
> >> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
> >> Acked-by: Eric Anholt <eric@anholt.net>
> >> ---
> >> .../devicetree/bindings/arm/bcm/bcm2835.yaml | 46 +++++++++++++++
> >> .../devicetree/bindings/arm/bcm/brcm,bcm2835.txt | 67 ----------------------
> >> 2 files changed, 46 insertions(+), 67 deletions(-)
> >> create mode 100644 Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
> >> delete mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
> >>
> >> diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
> >> new file mode 100644
> >> index 0000000..1a4be26
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
> >> @@ -0,0 +1,46 @@
> >> +# SPDX-License-Identifier: GPL-2.0
> >> +%YAML 1.2
> >> +---
> >> +$id: http://devicetree.org/schemas/arm/bcm/bcm2835.yaml#
> >> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >> +
> >> +title: Broadcom BCM2711/BCM2835 Platforms Device Tree Bindings
> >> +
> >> +maintainers:
> >> + - Eric Anholt <eric@anholt.net>
> >> + - Stefan Wahren <wahrenst@gmx.net>
> >> +
> >> +properties:
> >> + $nodename:
> >> + const: '/'
> >> + compatible:
> >> + oneOf:
> >> + - description: BCM2835 based Boards
> >> + items:
> >> + - enum:
> >> + - raspberrypi,model-a
> >> + - raspberrypi,model-a-plus
> >> + - raspberrypi,model-b
> >> + - raspberrypi,model-b-i2c0 # Raspberry Pi Model B (no P5)
> >> + - raspberrypi,model-b-rev2
> >> + - raspberrypi,model-b-plus
> >> + - raspberrypi,compute-module
> >> + - raspberrypi,model-zero
> >> + - raspberrypi,model-zero-w
> >> + - const: brcm,bcm2835
> >> +
> >> + - description: BCM2836 based Boards
> >> + items:
> >> + - enum:
> >> + - raspberrypi,2-model-b
> > Don't you need brcm,bcm2836 here?
> >
> >> +
> >> + - description: BCM2837 based Boards
> >> + items:
> >> + - enum:
> >> + - raspberrypi,3-model-a-plus
> >> + - raspberrypi,3-model-b
> >> + - raspberrypi,3-model-b-plus
> >> + - raspberrypi,3-compute-module
> >> + - raspberrypi,3-compute-module-lite
> > Don't you need brcm,bcm2837 here?
> >
> > Please run 'dtbs_check' and make sure there aren't warnings (in the root node).
>
> thanks, after addressing your comments the root node doesn't have
> warnings anymore.
>
> Beside that there a lot of other warnings:
>
> DTC arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml
> CHECK arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> arm-pmu: compatible: ['arm,cortex-a72-pmu', 'arm,armv8-pmuv3'] is too long
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> arm-pmu: compatible: Additional items are not allowed ('arm,armv8-pmuv3'
> was unexpected)
>
> I think the schema is a little bit too strict by prohibit a fallback
> compatible.
IIRC, Will Deacon said there wasn't any point to fallbacks as every
cpu has its own list of events. Or if we want a fallback, then add it
to the schema.
>
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> serial@7e201800: Additional properties are not allowed
> ('arm,primecell-periphid' was unexpected)
>
> In the old txt version this was an allowed property.
You really need an override? Haven't seen that in a while. We can drop
'additionalProperties: false' in the pl011 schema.
>
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> firmware: $nodename:0: 'firmware' does not match
> '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> firmware: '#address-cells' is a required property
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> firmware: '#size-cells' is a required property
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> firmware: 'ranges' is a required property
>
> I suggest to fix this by removing the "simple-bus".
Probably. 'firmware' doesn't sound like a bus.
>
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> serial@7e201a00: Additional properties are not allowed
> ('arm,primecell-periphid' was unexpected)
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> gpio@7e200000: 'pinctrl-0' is a dependency of 'pinctrl-names'
>
> This could be fixed by removing pinctrl-names.
>
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> serial@7e201600: Additional properties are not allowed
> ('arm,primecell-periphid' was unexpected)
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> gic400@40041000: $nodename:0: 'gic400@40041000' does not match
> '^interrupt-controller(@[0-9a-f,]+)*$'
>
> I will rename gic400 to interrupt-controller.
>
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> serial@7e201400: Additional properties are not allowed
> ('arm,primecell-periphid' was unexpected)
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> serial@7e201000: compatible: ['brcm,bcm2835-pl011', 'arm,pl011',
> 'arm,primecell'] is not valid under any of the given schemas
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> serial@7e201000: Additional properties are not allowed ('bluetooth',
> 'arm,primecell-periphid' were unexpected)
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> sd_io_1v8_reg: states:0: [1800000, 1, 3300000, 0] is too long
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> sd_io_1v8_reg: states:0: Additional items are not allowed (3300000, 0
> were unexpected)
>
> No idea what is wrong here
The schema is stricter about <> groupings is my guess. Looks like this
should be 2 entries with 2 cells each.
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml: clocks:
> #size-cells:0:0: 0 is not one of [1, 2]
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml: clocks:
> $nodename:0: 'clocks' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml: clocks:
> clock@3:reg:0: [3] is too short
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml: clocks:
> clock@4:reg:0: [4] is too short
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml: clocks:
> 'ranges' is a required property
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> clock@3: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'
> /home/stefan/torvalds/arch/arm/boot/dts/bcm2711-rpi-4-b.dt.yaml:
> clock@4: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> This could be fixed by avoiding a simple-bus for the fixed clocks.
Right, they are not a bus.
Rob
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^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH V2 10/13] dt-bindings: arm: bcm2835: Add Raspberry Pi 4 to DT schema
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
` (8 preceding siblings ...)
2019-08-13 16:20 ` [PATCH V2 09/13] dt-bindings: arm: Convert BCM2835 board/soc bindings to json-schema Stefan Wahren
@ 2019-08-13 16:20 ` Stefan Wahren
2019-08-13 16:20 ` [PATCH V2 11/13] ARM: bcm: Add support for BCM2711 SoC Stefan Wahren
` (3 subsequent siblings)
13 siblings, 0 replies; 31+ messages in thread
From: Stefan Wahren @ 2019-08-13 16:20 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
Add new Raspberry Pi 4 to DT schema.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Eric Anholt <eric@anholt.net>
---
Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
index 1a4be26..8c3bbad 100644
--- a/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
@@ -15,6 +15,11 @@ properties:
const: '/'
compatible:
oneOf:
+ - description: BCM2711 based Boards
+ items:
+ - enum:
+ - raspberrypi,4-model-b
+
- description: BCM2835 based Boards
items:
- enum:
--
2.7.4
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^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH V2 11/13] ARM: bcm: Add support for BCM2711 SoC
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
` (9 preceding siblings ...)
2019-08-13 16:20 ` [PATCH V2 10/13] dt-bindings: arm: bcm2835: Add Raspberry Pi 4 to DT schema Stefan Wahren
@ 2019-08-13 16:20 ` Stefan Wahren
2019-09-10 14:13 ` Matthias Brugger
2019-08-13 16:20 ` [PATCH V2 12/13] ARM: dts: Add minimal Raspberry Pi 4 support Stefan Wahren
` (2 subsequent siblings)
13 siblings, 1 reply; 31+ messages in thread
From: Stefan Wahren @ 2019-08-13 16:20 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
Add the BCM2711 to ARCH_BCM2835, but use new machine board code
because of the differences.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
---
arch/arm/mach-bcm/Kconfig | 3 ++-
arch/arm/mach-bcm/Makefile | 3 ++-
arch/arm/mach-bcm/bcm2711.c | 22 ++++++++++++++++++++++
3 files changed, 26 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/mach-bcm/bcm2711.c
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 5e5f1fa..39bcbea 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -161,6 +161,7 @@ config ARCH_BCM2835
select GPIOLIB
select ARM_AMBA
select ARM_ERRATA_411920 if ARCH_MULTI_V6
+ select ARM_GIC if ARCH_MULTI_V7
select ARM_TIMER_SP804
select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7
select TIMER_OF
@@ -169,7 +170,7 @@ config ARCH_BCM2835
select PINCTRL_BCM2835
select MFD_CORE
help
- This enables support for the Broadcom BCM2835 and BCM2836 SoCs.
+ This enables support for the Broadcom BCM2711 and BCM283x SoCs.
This SoC is used in the Raspberry Pi and Roku 2 devices.
config ARCH_BCM_53573
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index b59c813..7baa8c9 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -42,8 +42,9 @@ obj-$(CONFIG_ARCH_BCM_MOBILE_L2_CACHE) += kona_l2_cache.o
obj-$(CONFIG_ARCH_BCM_MOBILE_SMC) += bcm_kona_smc.o
# BCM2835
-obj-$(CONFIG_ARCH_BCM2835) += board_bcm2835.o
ifeq ($(CONFIG_ARCH_BCM2835),y)
+obj-y += board_bcm2835.o
+obj-y += bcm2711.o
ifeq ($(CONFIG_ARM),y)
obj-$(CONFIG_SMP) += platsmp.o
endif
diff --git a/arch/arm/mach-bcm/bcm2711.c b/arch/arm/mach-bcm/bcm2711.c
new file mode 100644
index 0000000..1fa15b4
--- /dev/null
+++ b/arch/arm/mach-bcm/bcm2711.c
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Stefan Wahren
+ */
+
+#include <linux/of_address.h>
+
+#include <asm/mach/arch.h>
+
+#include "platsmp.h"
+
+static const char * const bcm2711_compat[] = {
+#ifdef CONFIG_ARCH_MULTI_V7
+ "brcm,bcm2711",
+#endif
+};
+
+DT_MACHINE_START(BCM2711, "BCM2711")
+ .dma_zone_size = SZ_1G,
+ .dt_compat = bcm2711_compat,
+ .smp = smp_ops(bcm2836_smp_ops),
+MACHINE_END
--
2.7.4
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^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH V2 11/13] ARM: bcm: Add support for BCM2711 SoC
2019-08-13 16:20 ` [PATCH V2 11/13] ARM: bcm: Add support for BCM2711 SoC Stefan Wahren
@ 2019-09-10 14:13 ` Matthias Brugger
0 siblings, 0 replies; 31+ messages in thread
From: Matthias Brugger @ 2019-09-10 14:13 UTC (permalink / raw)
To: Stefan Wahren, Eric Anholt, Florian Fainelli, Ray Jui,
Scott Branden, Wolfram Sang, Rob Herring, Mark Rutland,
Michael Turquette, Stephen Boyd
Cc: devicetree, bcm-kernel-feedback-list, linux-i2c, linux-clk,
linux-arm-kernel, linux-rpi-kernel
On 13/08/2019 18:20, Stefan Wahren wrote:
> Add the BCM2711 to ARCH_BCM2835, but use new machine board code
> because of the differences.
>
> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
> ---
> arch/arm/mach-bcm/Kconfig | 3 ++-
> arch/arm/mach-bcm/Makefile | 3 ++-
> arch/arm/mach-bcm/bcm2711.c | 22 ++++++++++++++++++++++
> 3 files changed, 26 insertions(+), 2 deletions(-)
> create mode 100644 arch/arm/mach-bcm/bcm2711.c
>
> diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
> index 5e5f1fa..39bcbea 100644
> --- a/arch/arm/mach-bcm/Kconfig
> +++ b/arch/arm/mach-bcm/Kconfig
> @@ -161,6 +161,7 @@ config ARCH_BCM2835
> select GPIOLIB
> select ARM_AMBA
> select ARM_ERRATA_411920 if ARCH_MULTI_V6
> + select ARM_GIC if ARCH_MULTI_V7
> select ARM_TIMER_SP804
> select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7
> select TIMER_OF
> @@ -169,7 +170,7 @@ config ARCH_BCM2835
> select PINCTRL_BCM2835
> select MFD_CORE
> help
> - This enables support for the Broadcom BCM2835 and BCM2836 SoCs.
> + This enables support for the Broadcom BCM2711 and BCM283x SoCs.
> This SoC is used in the Raspberry Pi and Roku 2 devices.
>
> config ARCH_BCM_53573
> diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
> index b59c813..7baa8c9 100644
> --- a/arch/arm/mach-bcm/Makefile
> +++ b/arch/arm/mach-bcm/Makefile
> @@ -42,8 +42,9 @@ obj-$(CONFIG_ARCH_BCM_MOBILE_L2_CACHE) += kona_l2_cache.o
> obj-$(CONFIG_ARCH_BCM_MOBILE_SMC) += bcm_kona_smc.o
>
> # BCM2835
> -obj-$(CONFIG_ARCH_BCM2835) += board_bcm2835.o
> ifeq ($(CONFIG_ARCH_BCM2835),y)
> +obj-y += board_bcm2835.o
> +obj-y += bcm2711.o
> ifeq ($(CONFIG_ARM),y)
> obj-$(CONFIG_SMP) += platsmp.o
> endif
> diff --git a/arch/arm/mach-bcm/bcm2711.c b/arch/arm/mach-bcm/bcm2711.c
> new file mode 100644
> index 0000000..1fa15b4
> --- /dev/null
> +++ b/arch/arm/mach-bcm/bcm2711.c
> @@ -0,0 +1,22 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019 Stefan Wahren
> + */
> +
> +#include <linux/of_address.h>
> +
> +#include <asm/mach/arch.h>
> +
> +#include "platsmp.h"
> +
> +static const char * const bcm2711_compat[] = {
> +#ifdef CONFIG_ARCH_MULTI_V7
> + "brcm,bcm2711",
> +#endif
> +};
> +
> +DT_MACHINE_START(BCM2711, "BCM2711")
> + .dma_zone_size = SZ_1G,
Needs a dependency of ifdef CONFIG_ZONE_DMA.
Regards,
Matthias
> + .dt_compat = bcm2711_compat,
> + .smp = smp_ops(bcm2836_smp_ops),
> +MACHINE_END
> --
> 2.7.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
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^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH V2 12/13] ARM: dts: Add minimal Raspberry Pi 4 support
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
` (10 preceding siblings ...)
2019-08-13 16:20 ` [PATCH V2 11/13] ARM: bcm: Add support for BCM2711 SoC Stefan Wahren
@ 2019-08-13 16:20 ` Stefan Wahren
2019-08-13 16:20 ` [PATCH V2 13/13] MAINTAINERS: Add BCM2711 to BCM2835 ARCH Stefan Wahren
2019-08-13 20:42 ` [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Eric Anholt
13 siblings, 0 replies; 31+ messages in thread
From: Stefan Wahren @ 2019-08-13 16:20 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
This adds minimal support for the new Raspberry Pi 4 without the
fancy stuff like GENET, PCIe, xHCI, 40 bit DMA and V3D. The RPi 4 is
available in 3 different variants (1, 2 and 4 GB RAM), so leave the memory
size to zero and let the bootloader take care of it. The DWC2 is still
usable as peripheral via the USB-C port.
Other differences to the Raspberry Pi 3:
- additional GIC 400 Interrupt controller
- new thermal IP and HWRNG
- additional MMC interface (emmc2)
- additional UART, I2C, SPI and PWM interfaces
- clock stretching bug in I2C IP has been fixed
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Eric Anholt <eric@anholt.net>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 121 ++++
arch/arm/boot/dts/bcm2711.dtsi | 662 ++++++++++++++++++++++
arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi | 7 +
arch/arm/boot/dts/bcm283x.dtsi | 4 +-
5 files changed, 793 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm2711-rpi-4-b.dts
create mode 100644 arch/arm/boot/dts/bcm2711.dtsi
create mode 100644 arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 9159fa2..031ca32 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -83,6 +83,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
bcm2837-rpi-3-b.dtb \
bcm2837-rpi-3-b-plus.dtb \
bcm2837-rpi-cm3-io3.dtb \
+ bcm2711-rpi-4-b.dtb \
bcm2835-rpi-zero.dtb \
bcm2835-rpi-zero-w.dtb
dtb-$(CONFIG_ARCH_BCM_5301X) += \
diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
new file mode 100644
index 0000000..3825273
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+#include "bcm2711.dtsi"
+#include "bcm2835-rpi.dtsi"
+#include "bcm283x-rpi-usb-peripheral.dtsi"
+
+/ {
+ compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
+ model = "Raspberry Pi 4 Model B";
+
+ chosen {
+ /* 8250 auxiliary UART instead of pl011 */
+ stdout-path = "serial1:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0 0 0x00000000>;
+ };
+
+ leds {
+ act {
+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
+ };
+
+ pwr {
+ label = "PWR";
+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ sd_io_1v8_reg: sd_io_1v8_reg {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-sd-io";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-settling-time-us = <5000>;
+ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
+ states = <1800000 0x1
+ 3300000 0x0>;
+ status = "okay";
+ };
+};
+
+&firmware {
+ expgpio: gpio {
+ compatible = "raspberrypi,firmware-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "BT_ON",
+ "WL_ON",
+ "PWR_LED_OFF",
+ "GLOBAL_RESET",
+ "VDD_SD_IO_SEL",
+ "CAM_GPIO",
+ "",
+ "";
+ status = "okay";
+ };
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
+ status = "okay";
+};
+
+/* SDHCI is used to control the SDIO for wireless */
+&sdhci {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_gpio34>;
+ bus-width = <4>;
+ non-removable;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+/* EMMC2 is used to drive the SD card */
+&emmc2 {
+ vqmmc-supply = <&sd_io_1v8_reg>;
+ broken-cd;
+ status = "okay";
+};
+
+/* uart0 communicates with the BT module */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32 &gpclk2_gpio43>;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <2000000>;
+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+/* uart1 is mapped to the pin header */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_gpio14>;
+ status = "okay";
+};
+
+&vchiq {
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+};
diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
new file mode 100644
index 0000000..023ff27
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2711.dtsi
@@ -0,0 +1,662 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "bcm283x.dtsi"
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/bcm2835-pm.h>
+
+/ {
+ compatible = "brcm,bcm2711";
+
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&gicv2>;
+
+ soc {
+ ranges = <0x7e000000 0x0 0xfe000000 0x01800000>,
+ <0x7c000000 0x0 0xfc000000 0x02000000>,
+ <0x40000000 0x0 0xff800000 0x00800000>;
+ /* Emulate a contiguous 30-bit address range for DMA */
+ dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>;
+
+ local_intc: local_intc@40000000 {
+ compatible = "brcm,bcm2836-l1-intc";
+ reg = <0x40000000 0x100>;
+ };
+
+ gicv2: gic400@40041000 {
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ compatible = "arm,gic-400";
+ reg = <0x40041000 0x1000>,
+ <0x40042000 0x2000>,
+ <0x40044000 0x2000>,
+ <0x40046000 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ dma: dma@7e007000 {
+ compatible = "brcm,bcm2835-dma";
+ reg = <0x7e007000 0xb00>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+ /* DMA lite 7 - 10 */
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dma0",
+ "dma1",
+ "dma2",
+ "dma3",
+ "dma4",
+ "dma5",
+ "dma6",
+ "dma7",
+ "dma8",
+ "dma9",
+ "dma10";
+ #dma-cells = <1>;
+ brcm,dma-channel-mask = <0x07f5>;
+ };
+
+ pm: watchdog@7e100000 {
+ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
+ #power-domain-cells = <1>;
+ #reset-cells = <1>;
+ reg = <0x7e100000 0x114>,
+ <0x7e00a000 0x24>,
+ <0x7ec11000 0x20>;
+ clocks = <&clocks BCM2835_CLOCK_V3D>,
+ <&clocks BCM2835_CLOCK_PERI_IMAGE>,
+ <&clocks BCM2835_CLOCK_H264>,
+ <&clocks BCM2835_CLOCK_ISP>;
+ clock-names = "v3d", "peri_image", "h264", "isp";
+ system-power-controller;
+ };
+
+ rng@7e104000 {
+ interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+
+ /* RNG is incompatible to brcm,bcm2835-rng */
+ status = "disabled";
+ };
+
+ uart2: serial@7e201400 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x7e201400 0x200>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_UART>,
+ <&clocks BCM2835_CLOCK_VPU>;
+ clock-names = "uartclk", "apb_pclk";
+ arm,primecell-periphid = <0x00241011>;
+ status = "disabled";
+ };
+
+ uart3: serial@7e201600 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x7e201600 0x200>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_UART>,
+ <&clocks BCM2835_CLOCK_VPU>;
+ clock-names = "uartclk", "apb_pclk";
+ arm,primecell-periphid = <0x00241011>;
+ status = "disabled";
+ };
+
+ uart4: serial@7e201800 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x7e201800 0x200>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_UART>,
+ <&clocks BCM2835_CLOCK_VPU>;
+ clock-names = "uartclk", "apb_pclk";
+ arm,primecell-periphid = <0x00241011>;
+ status = "disabled";
+ };
+
+ uart5: serial@7e201a00 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x7e201a00 0x200>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_UART>,
+ <&clocks BCM2835_CLOCK_VPU>;
+ clock-names = "uartclk", "apb_pclk";
+ arm,primecell-periphid = <0x00241011>;
+ status = "disabled";
+ };
+
+ spi@7e204000 {
+ reg = <0x7e204000 0x0200>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ spi3: spi@7e204600 {
+ compatible = "brcm,bcm2835-spi";
+ reg = <0x7e204600 0x0200>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi4: spi@7e204800 {
+ compatible = "brcm,bcm2835-spi";
+ reg = <0x7e204800 0x0200>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi5: spi@7e204a00 {
+ compatible = "brcm,bcm2835-spi";
+ reg = <0x7e204a00 0x0200>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi6: spi@7e204c00 {
+ compatible = "brcm,bcm2835-spi";
+ reg = <0x7e204c00 0x0200>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@7e205600 {
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+ reg = <0x7e205600 0x200>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@7e205800 {
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+ reg = <0x7e205800 0x200>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c5: i2c@7e205a00 {
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+ reg = <0x7e205a00 0x200>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c6: i2c@7e205c00 {
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+ reg = <0x7e205c00 0x200>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ pwm1: pwm@7e20c800 {
+ compatible = "brcm,bcm2835-pwm";
+ reg = <0x7e20c800 0x28>;
+ clocks = <&clocks BCM2835_CLOCK_PWM>;
+ assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
+ assigned-clock-rates = <10000000>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ emmc2: emmc2@7e340000 {
+ compatible = "brcm,bcm2711-emmc2";
+ reg = <0x7e340000 0x100>;
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2711_CLOCK_EMMC2>;
+ status = "disabled";
+ };
+
+ hvs@7e400000 {
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_LOW)>;
+ /* This only applies to the ARMv7 stub */
+ arm,cpu-registers-not-fw-configured;
+
+ /* The ARM cores doesn't enter deep enough states */
+ always-on;
+ };
+
+ cpus: cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0x000000d8>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <1>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0x000000e0>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <2>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0x000000e8>;
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <3>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0x000000f0>;
+ };
+ };
+};
+
+&clk_osc {
+ clock-frequency = <54000000>;
+};
+
+&clocks {
+ compatible = "brcm,bcm2711-cprman";
+};
+
+&cpu_thermal {
+ coefficients = <(-487) 410040>;
+};
+
+&dsi0 {
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&dsi1 {
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&gpio {
+ compatible = "brcm,bcm2711-gpio";
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+
+ gpclk0_gpio49: gpclk0_gpio49 {
+ brcm,pins = <49>;
+ brcm,function = <BCM2835_FSEL_ALT1>;
+ brcm,pull = <BCM2835_PUD_OFF>;
+ };
+ gpclk1_gpio50: gpclk1_gpio50 {
+ brcm,pins = <50>;
+ brcm,function = <BCM2835_FSEL_ALT1>;
+ brcm,pull = <BCM2835_PUD_OFF>;
+ };
+ gpclk2_gpio51: gpclk2_gpio51 {
+ brcm,pins = <51>;
+ brcm,function = <BCM2835_FSEL_ALT1>;
+ brcm,pull = <BCM2835_PUD_OFF>;
+ };
+
+ i2c0_gpio46: i2c0_gpio46 {
+ brcm,pins = <46 47>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c1_gpio46: i2c1_gpio46 {
+ brcm,pins = <46 47>;
+ brcm,function = <BCM2835_FSEL_ALT1>;
+ };
+ i2c3_gpio2: i2c3_gpio2 {
+ brcm,pins = <2 3>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ i2c3_gpio4: i2c3_gpio4 {
+ brcm,pins = <4 5>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ i2c4_gpio6: i2c4_gpio6 {
+ brcm,pins = <6 7>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ i2c4_gpio8: i2c4_gpio8 {
+ brcm,pins = <8 9>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ i2c5_gpio10: i2c5_gpio10 {
+ brcm,pins = <10 11>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ i2c5_gpio12: i2c5_gpio12 {
+ brcm,pins = <12 13>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ i2c6_gpio0: i2c6_gpio0 {
+ brcm,pins = <0 1>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ i2c6_gpio22: i2c6_gpio22 {
+ brcm,pins = <22 23>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ i2c_slave_gpio8: i2c_slave_gpio8 {
+ brcm,pins = <8 9 10 11>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ jtag_gpio48: jtag_gpio48 {
+ brcm,pins = <48 49 50 51 52 53>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+
+ mii_gpio28: mii_gpio28 {
+ brcm,pins = <28 29 30 31>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ mii_gpio36: mii_gpio36 {
+ brcm,pins = <36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+
+ pcm_gpio50: pcm_gpio50 {
+ brcm,pins = <50 51 52 53>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+
+ pwm0_0_gpio12: pwm0_0_gpio12 {
+ brcm,pins = <12>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_0_gpio18: pwm0_0_gpio18 {
+ brcm,pins = <18>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm1_0_gpio40: pwm1_0_gpio40 {
+ brcm,pins = <40>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_1_gpio13: pwm0_1_gpio13 {
+ brcm,pins = <13>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_1_gpio19: pwm0_1_gpio19 {
+ brcm,pins = <19>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm1_1_gpio41: pwm1_1_gpio41 {
+ brcm,pins = <41>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_1_gpio45: pwm0_1_gpio45 {
+ brcm,pins = <45>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_0_gpio52: pwm0_0_gpio52 {
+ brcm,pins = <52>;
+ brcm,function = <BCM2835_FSEL_ALT1>;
+ brcm,pull = <BCM2835_PUD_OFF>;
+ };
+ pwm0_1_gpio53: pwm0_1_gpio53 {
+ brcm,pins = <53>;
+ brcm,function = <BCM2835_FSEL_ALT1>;
+ brcm,pull = <BCM2835_PUD_OFF>;
+ };
+
+ /* The following group consists of:
+ * RGMII_START_STOP
+ * RGMII_RX_OK
+ */
+ rgmii_gpio35: rgmii_gpio35 {
+ brcm,pins = <35 36>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ rgmii_irq_gpio34: rgmii_irq_gpio34 {
+ brcm,pins = <34>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ rgmii_irq_gpio39: rgmii_irq_gpio39 {
+ brcm,pins = <39>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ rgmii_mdio_gpio28: rgmii_mdio_gpio28 {
+ brcm,pins = <28 29>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ rgmii_mdio_gpio37: rgmii_mdio_gpio37 {
+ brcm,pins = <37 38>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+
+ spi0_gpio46: spi0_gpio46 {
+ brcm,pins = <46 47 48 49>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ spi2_gpio46: spi2_gpio46 {
+ brcm,pins = <46 47 48 49 50>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ spi3_gpio0: spi3_gpio0 {
+ brcm,pins = <0 1 2 3>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ spi4_gpio4: spi4_gpio4 {
+ brcm,pins = <4 5 6 7>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ spi5_gpio12: spi5_gpio12 {
+ brcm,pins = <12 13 14 15>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ spi6_gpio18: spi6_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ uart2_gpio0: uart2_gpio0 {
+ pin-tx {
+ brcm,pins = <0>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_OFF>;
+ };
+ pin-rx {
+ brcm,pins = <1>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+ };
+ uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 {
+ pin-cts {
+ brcm,pins = <2>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+ pin-rts {
+ brcm,pins = <3>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_OFF>;
+ };
+ };
+ uart3_gpio4: uart3_gpio4 {
+ pin-tx {
+ brcm,pins = <4>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_OFF>;
+ };
+ pin-rx {
+ brcm,pins = <5>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+ };
+ uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 {
+ pin-cts {
+ brcm,pins = <6>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+ pin-rts {
+ brcm,pins = <7>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_OFF>;
+ };
+ };
+ uart4_gpio8: uart4_gpio8 {
+ pin-tx {
+ brcm,pins = <8>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_OFF>;
+ };
+ pin-rx {
+ brcm,pins = <9>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+ };
+ uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 {
+ pin-cts {
+ brcm,pins = <10>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+ pin-rts {
+ brcm,pins = <11>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_OFF>;
+ };
+ };
+ uart5_gpio12: uart5_gpio12 {
+ pin-tx {
+ brcm,pins = <12>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_OFF>;
+ };
+ pin-rx {
+ brcm,pins = <13>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+ };
+ uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 {
+ pin-cts {
+ brcm,pins = <14>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+ pin-rts {
+ brcm,pins = <15>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <BCM2835_PUD_OFF>;
+ };
+ };
+};
+
+&i2c0 {
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&i2c1 {
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&i2c2 {
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&mailbox {
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&sdhci {
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&sdhost {
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&spi1 {
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&spi2 {
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&system_timer {
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&txp {
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&uart0 {
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&uart1 {
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&usb {
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&vec {
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+};
diff --git a/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi b/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
new file mode 100644
index 0000000..0ff0e9e
--- /dev/null
+++ b/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0
+&usb {
+ dr_mode = "peripheral";
+ g-rx-fifo-size = <256>;
+ g-np-tx-fifo-size = <32>;
+ g-tx-fifo-size = <256 256 512 512 512 768 768>;
+};
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index cbc9422..5655ae4 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -53,7 +53,7 @@
#address-cells = <1>;
#size-cells = <1>;
- timer@7e003000 {
+ system_timer: timer@7e003000 {
compatible = "brcm,bcm2835-system-timer";
reg = <0x7e003000 0x1000>;
interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
@@ -64,7 +64,7 @@
clock-frequency = <1000000>;
};
- txp@7e004000 {
+ txp: txp@7e004000 {
compatible = "brcm,bcm2835-txp";
reg = <0x7e004000 0x20>;
interrupts = <1 11>;
--
2.7.4
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH V2 13/13] MAINTAINERS: Add BCM2711 to BCM2835 ARCH
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
` (11 preceding siblings ...)
2019-08-13 16:20 ` [PATCH V2 12/13] ARM: dts: Add minimal Raspberry Pi 4 support Stefan Wahren
@ 2019-08-13 16:20 ` Stefan Wahren
2019-08-13 20:42 ` [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Eric Anholt
13 siblings, 0 replies; 31+ messages in thread
From: Stefan Wahren @ 2019-08-13 16:20 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
Clarify that BCM2711 belongs to the BCM2835 ARCH.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Eric Anholt <eric@anholt.net>
---
MAINTAINERS | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 6426db5..13c7c64 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3168,7 +3168,7 @@ N: bcm216*
N: kona
F: arch/arm/mach-bcm/
-BROADCOM BCM2835 ARM ARCHITECTURE
+BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
M: Eric Anholt <eric@anholt.net>
M: Stefan Wahren <wahrenst@gmx.net>
L: bcm-kernel-feedback-list@broadcom.com
@@ -3176,6 +3176,7 @@ L: linux-rpi-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
T: git git://github.com/anholt/linux
S: Maintained
+N: bcm2711
N: bcm2835
F: drivers/staging/vc04_services
--
2.7.4
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support
2019-08-13 16:20 [PATCH V2 00/13] ARM: Add minimal Raspberry Pi 4 support Stefan Wahren
` (12 preceding siblings ...)
2019-08-13 16:20 ` [PATCH V2 13/13] MAINTAINERS: Add BCM2711 to BCM2835 ARCH Stefan Wahren
@ 2019-08-13 20:42 ` Eric Anholt
13 siblings, 0 replies; 31+ messages in thread
From: Eric Anholt @ 2019-08-13 20:42 UTC (permalink / raw)
To: Stefan Wahren, Florian Fainelli, Ray Jui, Scott Branden,
Wolfram Sang, Rob Herring, Mark Rutland, Michael Turquette,
Stephen Boyd
Cc: devicetree, Stefan Wahren, bcm-kernel-feedback-list,
linux-rpi-kernel, linux-clk, linux-arm-kernel, linux-i2c
[-- Attachment #1.1: Type: text/plain, Size: 440 bytes --]
Stefan Wahren <wahrenst@gmx.net> writes:
> This series adds minimal support for the new Raspberry Pi 4, so we are able
> to login via debug UART.
>
> Patch 1-2: Prepare platform and DTS for the new SoC BMC2711
> Patch 3-6: Enable clock support for BCM2711
> Patch 7-8: Add I2C support for BCM2711
> Patch 9-12: Add Raspberry Pi 4 DTS support
> Patch 13: Update MAINTAINERS
Series is:
Reviewed-by: Eric Anholt <eric@anholt.net>
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 832 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
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^ permalink raw reply [flat|nested] 31+ messages in thread