From: Robert Chiras <robert.chiras@nxp.com>
To: "Guido Günther" <agx@sigxcpu.org>, "Marek Vasut" <marex@denx.de>,
"Stefan Agner" <stefan@agner.ch>,
"David Airlie" <airlied@linux.ie>,
"Daniel Vetter" <daniel@ffwll.ch>,
"Rob Herring" <robh+dt@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org,
NXP Linux Team <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 13/15] drm/mxsfb: Clear OUTSTANDING_REQS bits
Date: Wed, 14 Aug 2019 13:48:49 +0300 [thread overview]
Message-ID: <1565779731-1300-14-git-send-email-robert.chiras@nxp.com> (raw)
In-Reply-To: <1565779731-1300-1-git-send-email-robert.chiras@nxp.com>
Bit 21 can alter the CTRL2_OUTSTANDING_REQS value right after the eLCDIF
is enabled, since it comes up with default value of 1 (this behaviour
has been seen on some imx8 platforms).
In order to fix this, clear CTRL2_OUTSTANDING_REQS bits before setting
its value.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
---
drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
index e727f5e..a12f53d 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
@@ -225,6 +225,13 @@ static void mxsfb_enable_controller(struct mxsfb_drm_private *mxsfb)
clk_prepare_enable(mxsfb->clk);
if (mxsfb->devdata->ipversion >= 4) {
+ /*
+ * On some platforms, bit 21 is defaulted to 1, which may alter
+ * the below setting. So, to make sure we have the right setting
+ * clear all the bits for CTRL2_OUTSTANDING_REQS.
+ */
+ writel(CTRL2_OUTSTANDING_REQS(0x7),
+ mxsfb->base + LCDC_V4_CTRL2 + REG_CLR);
writel(CTRL2_OUTSTANDING_REQS(REQ_16),
mxsfb->base + LCDC_V4_CTRL2 + REG_SET);
/* Assert LCD Reset bit */
--
2.7.4
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next prev parent reply other threads:[~2019-08-14 10:51 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-14 10:48 [PATCH v2 00/15] Improvements and fixes for mxsfb DRM driver Robert Chiras
2019-08-14 10:48 ` [PATCH v2 01/15] drm/mxsfb: Update mxsfb to support a bridge Robert Chiras
2019-08-14 10:48 ` [PATCH v2 02/15] drm/mxsfb: Read bus flags from bridge if present Robert Chiras
2019-08-14 10:48 ` [PATCH v2 03/15] drm/mxsfb: Add defines for the rest of registers Robert Chiras
2019-08-14 10:48 ` [PATCH v2 04/15] drm/mxsfb: Reset vital register for a proper initialization Robert Chiras
2019-08-14 11:11 ` Stefan Agner
2019-08-14 11:38 ` [EXT] " Robert Chiras
2019-08-14 10:48 ` [PATCH v2 05/15] drm/mxsfb: Update register definitions using bit manipulation defines Robert Chiras
2019-08-14 10:48 ` [PATCH v2 06/15] drm/mxsfb: Update mxsfb with additional pixel formats Robert Chiras
2019-08-14 11:44 ` Daniel Stone
2019-08-14 14:58 ` [EXT] " Robert Chiras
2019-08-14 10:48 ` [PATCH v2 07/15] drm/mxsfb: Fix the vblank events Robert Chiras
2019-08-14 17:31 ` Daniel Vetter
2019-08-14 10:48 ` [PATCH v2 08/15] drm/mxsfb: Signal mode changed when bpp changed Robert Chiras
2019-08-14 10:48 ` [PATCH v2 09/15] dt-bindings: display: Add max-res property for mxsfb Robert Chiras
2019-08-14 11:03 ` Stefan Agner
2019-08-14 11:14 ` [EXT] " Robert Chiras
2019-08-14 11:25 ` Stefan Agner
2019-08-14 12:03 ` Robert Chiras
2019-08-14 10:48 ` [PATCH v2 10/15] drm/mxsfb: Add max-res property for MXSFB Robert Chiras
2019-08-14 10:48 ` [PATCH v2 11/15] drm/mxsfb: Update mxsfb to support LCD reset Robert Chiras
2019-08-14 10:48 ` [PATCH v2 12/15] drm/mxsfb: Improve the axi clock usage Robert Chiras
2019-08-14 11:06 ` Stefan Agner
2019-08-14 11:35 ` [EXT] " Robert Chiras
2019-08-14 10:48 ` Robert Chiras [this message]
2019-08-14 10:48 ` [PATCH v2 14/15] drm/mxsfb: Add support for horizontal stride Robert Chiras
2019-08-14 10:48 ` [PATCH v2 15/15] drm/mxsfb: Add support for live pixel format change Robert Chiras
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