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* [PATCH 1/6] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support
@ 2019-08-15 10:59 Anson.Huang
  2019-08-15 10:59 ` [PATCH 2/6] arm64: dts: imx8mn-ddr4-evk: Add rohm, bd71847 PMIC support Anson.Huang
                   ` (5 more replies)
  0 siblings, 6 replies; 11+ messages in thread
From: Anson.Huang @ 2019-08-15 10:59 UTC (permalink / raw)
  To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
	mturquette, sboyd, rjw, viresh.kumar, leonard.crestez, abel.vesa,
	devicetree, linux-arm-kernel, linux-kernel, linux-clk, linux-pm
  Cc: Linux-imx

From: Anson Huang <Anson.Huang@nxp.com>

Enable i2c1 on i.MX8MN DDR4 EVK board.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
index 9b2c172..5fce5b1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
@@ -50,6 +50,13 @@
 		>;
 	};
 
+	pinctrl_i2c1: i2c1grp {
+		fsl,pins = <
+			MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL		0x400001c3
+			MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA		0x400001c3
+		>;
+	};
+
 	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc {
 		fsl,pins = <
 			MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
@@ -182,6 +189,13 @@
 	};
 };
 
+&i2c1 {
+	clock-frequency = <400000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+};
+
 &snvs_pwrkey {
 	status = "okay";
 };
-- 
2.7.4


_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH 2/6] arm64: dts: imx8mn-ddr4-evk: Add rohm, bd71847 PMIC support
  2019-08-15 10:59 [PATCH 1/6] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support Anson.Huang
@ 2019-08-15 10:59 ` Anson.Huang
  2019-08-15 10:59 ` [PATCH 3/6] cpufreq: Use imx-cpufreq-dt for i.MX8MN's speed grading Anson.Huang
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 11+ messages in thread
From: Anson.Huang @ 2019-08-15 10:59 UTC (permalink / raw)
  To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
	mturquette, sboyd, rjw, viresh.kumar, leonard.crestez, abel.vesa,
	devicetree, linux-arm-kernel, linux-kernel, linux-clk, linux-pm
  Cc: Linux-imx

From: Anson Huang <Anson.Huang@nxp.com>

On i.MX8MN DDR4 EVK board, there is a rohm,bd71847 PMIC
on i2c1 bus, enable it.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 109 ++++++++++++++++++++++
 1 file changed, 109 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
index 5fce5b1..10ebf77 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
@@ -57,6 +57,12 @@
 		>;
 	};
 
+	pinctrl_pmic: pmicirq {
+		fsl,pins = <
+			MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x41
+		>;
+	};
+
 	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc {
 		fsl,pins = <
 			MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
@@ -194,6 +200,109 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_i2c1>;
 	status = "okay";
+
+	pmic@4b {
+		compatible = "rohm,bd71847";
+		reg = <0x4b>;
+		pinctrl-0 = <&pinctrl_pmic>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <3 GPIO_ACTIVE_LOW>;
+		rohm,reset-snvs-powered;
+
+		regulators {
+			buck1_reg: BUCK1 {
+				regulator-name = "BUCK1";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1300000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <1250>;
+			};
+
+			buck2_reg: BUCK2 {
+				regulator-name = "BUCK2";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1300000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <1250>;
+			};
+
+			buck3_reg: BUCK3 {
+				// BUCK5 in datasheet
+				regulator-name = "BUCK3";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1350000>;
+			};
+
+			buck4_reg: BUCK4 {
+				// BUCK6 in datasheet
+				regulator-name = "BUCK4";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buck5_reg: BUCK5 {
+				// BUCK7 in datasheet
+				regulator-name = "BUCK5";
+				regulator-min-microvolt = <1605000>;
+				regulator-max-microvolt = <1995000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buck6_reg: BUCK6 {
+				// BUCK8 in datasheet
+				regulator-name = "BUCK6";
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1400000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo1_reg: LDO1 {
+				regulator-name = "LDO1";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo2_reg: LDO2 {
+				regulator-name = "LDO2";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <900000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo3_reg: LDO3 {
+				regulator-name = "LDO3";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo4_reg: LDO4 {
+				regulator-name = "LDO4";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo6_reg: LDO6 {
+				regulator-name = "LDO6";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
 };
 
 &snvs_pwrkey {
-- 
2.7.4


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH 3/6] cpufreq: Use imx-cpufreq-dt for i.MX8MN's speed grading
  2019-08-15 10:59 [PATCH 1/6] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support Anson.Huang
  2019-08-15 10:59 ` [PATCH 2/6] arm64: dts: imx8mn-ddr4-evk: Add rohm, bd71847 PMIC support Anson.Huang
@ 2019-08-15 10:59 ` Anson.Huang
  2019-08-15 10:59 ` [PATCH 4/6] cpufreq: imx-cpufreq-dt: Add i.MX8MN support Anson.Huang
                   ` (3 subsequent siblings)
  5 siblings, 0 replies; 11+ messages in thread
From: Anson.Huang @ 2019-08-15 10:59 UTC (permalink / raw)
  To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
	mturquette, sboyd, rjw, viresh.kumar, leonard.crestez, abel.vesa,
	devicetree, linux-arm-kernel, linux-kernel, linux-clk, linux-pm
  Cc: Linux-imx

From: Anson Huang <Anson.Huang@nxp.com>

Add i.MX8MN to blacklist, so that imx-cpufreq-dt driver can handle
speed grading bits just like other i.MX8M SoCs.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index ec2057d..febcec8 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -109,6 +109,7 @@ static const struct of_device_id blacklist[] __initconst = {
 	{ .compatible = "fsl,imx7d", },
 	{ .compatible = "fsl,imx8mq", },
 	{ .compatible = "fsl,imx8mm", },
+	{ .compatible = "fsl,imx8mn", },
 
 	{ .compatible = "marvell,armadaxp", },
 
-- 
2.7.4


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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH 4/6] cpufreq: imx-cpufreq-dt: Add i.MX8MN support
  2019-08-15 10:59 [PATCH 1/6] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support Anson.Huang
  2019-08-15 10:59 ` [PATCH 2/6] arm64: dts: imx8mn-ddr4-evk: Add rohm, bd71847 PMIC support Anson.Huang
  2019-08-15 10:59 ` [PATCH 3/6] cpufreq: Use imx-cpufreq-dt for i.MX8MN's speed grading Anson.Huang
@ 2019-08-15 10:59 ` Anson.Huang
  2019-08-15 10:59 ` [PATCH 5/6] clk: imx8mn: Add necessary frequency support for ARM PLL table Anson.Huang
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 11+ messages in thread
From: Anson.Huang @ 2019-08-15 10:59 UTC (permalink / raw)
  To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
	mturquette, sboyd, rjw, viresh.kumar, leonard.crestez, abel.vesa,
	devicetree, linux-arm-kernel, linux-kernel, linux-clk, linux-pm
  Cc: Linux-imx

From: Anson Huang <Anson.Huang@nxp.com>

i.MX8MN has different speed grading definition as below, it has 4 bits
to define speed grading, add support for it.

 SPEED_GRADE[3:0]    MHz
    0000            2300
    0001            2200
    0010            2100
    0011            2000
    0100            1900
    0101            1800
    0110            1700
    0111            1600
    1000            1500
    1001            1400
    1010            1300
    1011            1200
    1100            1100
    1101            1000
    1110             900
    1111             800

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 drivers/cpufreq/imx-cpufreq-dt.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/cpufreq/imx-cpufreq-dt.c b/drivers/cpufreq/imx-cpufreq-dt.c
index 4f85f31..35db14c 100644
--- a/drivers/cpufreq/imx-cpufreq-dt.c
+++ b/drivers/cpufreq/imx-cpufreq-dt.c
@@ -16,6 +16,7 @@
 
 #define OCOTP_CFG3_SPEED_GRADE_SHIFT	8
 #define OCOTP_CFG3_SPEED_GRADE_MASK	(0x3 << 8)
+#define IMX8MN_OCOTP_CFG3_SPEED_GRADE_MASK	(0xf << 8)
 #define OCOTP_CFG3_MKT_SEGMENT_SHIFT    6
 #define OCOTP_CFG3_MKT_SEGMENT_MASK     (0x3 << 6)
 
@@ -34,7 +35,12 @@ static int imx_cpufreq_dt_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
-	speed_grade = (cell_value & OCOTP_CFG3_SPEED_GRADE_MASK) >> OCOTP_CFG3_SPEED_GRADE_SHIFT;
+	if (of_machine_is_compatible("fsl,imx8mn"))
+		speed_grade = (cell_value & IMX8MN_OCOTP_CFG3_SPEED_GRADE_MASK)
+			      >> OCOTP_CFG3_SPEED_GRADE_SHIFT;
+	else
+		speed_grade = (cell_value & OCOTP_CFG3_SPEED_GRADE_MASK)
+			      >> OCOTP_CFG3_SPEED_GRADE_SHIFT;
 	mkt_segment = (cell_value & OCOTP_CFG3_MKT_SEGMENT_MASK) >> OCOTP_CFG3_MKT_SEGMENT_SHIFT;
 
 	/*
-- 
2.7.4


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH 5/6] clk: imx8mn: Add necessary frequency support for ARM PLL table
  2019-08-15 10:59 [PATCH 1/6] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support Anson.Huang
                   ` (2 preceding siblings ...)
  2019-08-15 10:59 ` [PATCH 4/6] cpufreq: imx-cpufreq-dt: Add i.MX8MN support Anson.Huang
@ 2019-08-15 10:59 ` Anson.Huang
  2019-08-17  3:52   ` Stephen Boyd
  2019-08-15 10:59 ` [PATCH 6/6] arm64: dts: imx8mn: Add cpu-freq support Anson.Huang
  2019-08-15 14:12 ` [PATCH 1/6] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support Leonard Crestez
  5 siblings, 1 reply; 11+ messages in thread
From: Anson.Huang @ 2019-08-15 10:59 UTC (permalink / raw)
  To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
	mturquette, sboyd, rjw, viresh.kumar, leonard.crestez, abel.vesa,
	devicetree, linux-arm-kernel, linux-kernel, linux-clk, linux-pm
  Cc: Linux-imx

From: Anson Huang <Anson.Huang@nxp.com>

i.MX8MN supports CPU running at 1.5GHz/1.4GHz/1.2GHz, add missing
frequency for ARM PLL table.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 drivers/clk/imx/clk-imx8mn.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index ecd1062..3f1239a 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -42,6 +42,8 @@ enum {
 static const struct imx_pll14xx_rate_table imx8mn_pll1416x_tbl[] = {
 	PLL_1416X_RATE(1800000000U, 225, 3, 0),
 	PLL_1416X_RATE(1600000000U, 200, 3, 0),
+	PLL_1416X_RATE(1500000000U, 375, 3, 1),
+	PLL_1416X_RATE(1400000000U, 350, 3, 1),
 	PLL_1416X_RATE(1200000000U, 300, 3, 1),
 	PLL_1416X_RATE(1000000000U, 250, 3, 1),
 	PLL_1416X_RATE(800000000U,  200, 3, 1),
@@ -82,6 +84,7 @@ static struct imx_pll14xx_clk imx8mn_dram_pll = {
 static struct imx_pll14xx_clk imx8mn_arm_pll = {
 		.type = PLL_1416X,
 		.rate_table = imx8mn_pll1416x_tbl,
+		.rate_count = ARRAY_SIZE(imx8mn_pll1416x_tbl),
 };
 
 static struct imx_pll14xx_clk imx8mn_gpu_pll = {
-- 
2.7.4


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^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH 6/6] arm64: dts: imx8mn: Add cpu-freq support
  2019-08-15 10:59 [PATCH 1/6] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support Anson.Huang
                   ` (3 preceding siblings ...)
  2019-08-15 10:59 ` [PATCH 5/6] clk: imx8mn: Add necessary frequency support for ARM PLL table Anson.Huang
@ 2019-08-15 10:59 ` Anson.Huang
  2019-08-15 14:12 ` [PATCH 1/6] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support Leonard Crestez
  5 siblings, 0 replies; 11+ messages in thread
From: Anson.Huang @ 2019-08-15 10:59 UTC (permalink / raw)
  To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
	mturquette, sboyd, rjw, viresh.kumar, leonard.crestez, abel.vesa,
	devicetree, linux-arm-kernel, linux-kernel, linux-clk, linux-pm
  Cc: Linux-imx

From: Anson Huang <Anson.Huang@nxp.com>

Add A53 OPP table, cpu regulator and speed grading node to
support cpu-freq driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts |  4 +++
 arch/arm64/boot/dts/freescale/imx8mn.dtsi         | 41 +++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
index 10ebf77..11c705d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
@@ -27,6 +27,10 @@
 	};
 };
 
+&A53_0 {
+	cpu-supply = <&buck2_reg>;
+};
+
 &iomuxc {
 	pinctrl-names = "default";
 
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 1d8899b..785f4c4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -51,6 +51,9 @@
 			clocks = <&clk IMX8MN_CLK_ARM>;
 			enable-method = "psci";
 			next-level-cache = <&A53_L2>;
+			operating-points-v2 = <&a53_opp_table>;
+			nvmem-cells = <&cpu_speed_grade>;
+			nvmem-cell-names = "speed_grade";
 		};
 
 		A53_1: cpu@1 {
@@ -61,6 +64,7 @@
 			clocks = <&clk IMX8MN_CLK_ARM>;
 			enable-method = "psci";
 			next-level-cache = <&A53_L2>;
+			operating-points-v2 = <&a53_opp_table>;
 		};
 
 		A53_2: cpu@2 {
@@ -71,6 +75,7 @@
 			clocks = <&clk IMX8MN_CLK_ARM>;
 			enable-method = "psci";
 			next-level-cache = <&A53_L2>;
+			operating-points-v2 = <&a53_opp_table>;
 		};
 
 		A53_3: cpu@3 {
@@ -81,6 +86,7 @@
 			clocks = <&clk IMX8MN_CLK_ARM>;
 			enable-method = "psci";
 			next-level-cache = <&A53_L2>;
+			operating-points-v2 = <&a53_opp_table>;
 		};
 
 		A53_L2: l2-cache0 {
@@ -88,6 +94,35 @@
 		};
 	};
 
+	a53_opp_table: opp-table {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp-1200000000 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <850000>;
+			opp-supported-hw = <0xb00>, <0x7>;
+			clock-latency-ns = <150000>;
+			opp-suspend;
+		};
+
+		opp-1400000000 {
+			opp-hz = /bits/ 64 <1400000000>;
+			opp-microvolt = <950000>;
+			opp-supported-hw = <0x300>, <0x7>;
+			clock-latency-ns = <150000>;
+			opp-suspend;
+		};
+
+		opp-1500000000 {
+			opp-hz = /bits/ 64 <1500000000>;
+			opp-microvolt = <1000000>;
+			opp-supported-hw = <0x100>, <0x3>;
+			clock-latency-ns = <150000>;
+			opp-suspend;
+		};
+	};
+
 	memory@40000000 {
 		device_type = "memory";
 		reg = <0x0 0x40000000 0 0x80000000>;
@@ -288,6 +323,12 @@
 				compatible = "fsl,imx8mn-ocotp", "fsl,imx7d-ocotp", "syscon";
 				reg = <0x30350000 0x10000>;
 				clocks = <&clk IMX8MN_CLK_OCOTP_ROOT>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				cpu_speed_grade: speed-grade@10 {
+					reg = <0x10 4>;
+				};
 			};
 
 			anatop: anatop@30360000 {
-- 
2.7.4


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^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH 1/6] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support
  2019-08-15 10:59 [PATCH 1/6] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support Anson.Huang
                   ` (4 preceding siblings ...)
  2019-08-15 10:59 ` [PATCH 6/6] arm64: dts: imx8mn: Add cpu-freq support Anson.Huang
@ 2019-08-15 14:12 ` Leonard Crestez
  5 siblings, 0 replies; 11+ messages in thread
From: Leonard Crestez @ 2019-08-15 14:12 UTC (permalink / raw)
  To: Anson Huang, shawnguo, sboyd, viresh.kumar
  Cc: mark.rutland, devicetree, Abel Vesa, linux-pm, s.hauer, rjw,
	linux-kernel, linux-clk, robh+dt, dl-linux-imx, kernel, festevam,
	mturquette, linux-arm-kernel

On 15.08.2019 14:18, Anson.Huang@nxp.com wrote:
> From: Anson Huang <Anson.Huang@nxp.com>
> 
> Enable i2c1 on i.MX8MN DDR4 EVK board.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

Didn't see a cover letter but all 6 patches look good:

Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>

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^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH 5/6] clk: imx8mn: Add necessary frequency support for ARM PLL table
  2019-08-15 10:59 ` [PATCH 5/6] clk: imx8mn: Add necessary frequency support for ARM PLL table Anson.Huang
@ 2019-08-17  3:52   ` Stephen Boyd
  2019-08-17 22:22     ` Anson Huang
  0 siblings, 1 reply; 11+ messages in thread
From: Stephen Boyd @ 2019-08-17  3:52 UTC (permalink / raw)
  To: Anson.Huang, abel.vesa, devicetree, festevam, kernel,
	leonard.crestez, linux-arm-kernel, linux-clk, linux-kernel,
	linux-pm, mark.rutland, mturquette, rjw, robh+dt, s.hauer,
	shawnguo, viresh.kumar
  Cc: Linux-imx

Quoting Anson.Huang@nxp.com (2019-08-15 03:59:42)
> diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
> index ecd1062..3f1239a 100644
> --- a/drivers/clk/imx/clk-imx8mn.c
> +++ b/drivers/clk/imx/clk-imx8mn.c
> @@ -82,6 +84,7 @@ static struct imx_pll14xx_clk imx8mn_dram_pll = {
>  static struct imx_pll14xx_clk imx8mn_arm_pll = {
>                 .type = PLL_1416X,
>                 .rate_table = imx8mn_pll1416x_tbl,
> +               .rate_count = ARRAY_SIZE(imx8mn_pll1416x_tbl),

Why is rate_count added? That's not described in the commit text.


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^ permalink raw reply	[flat|nested] 11+ messages in thread

* RE: [PATCH 5/6] clk: imx8mn: Add necessary frequency support for ARM PLL table
  2019-08-17  3:52   ` Stephen Boyd
@ 2019-08-17 22:22     ` Anson Huang
  2019-08-18  1:11       ` Stephen Boyd
  0 siblings, 1 reply; 11+ messages in thread
From: Anson Huang @ 2019-08-17 22:22 UTC (permalink / raw)
  To: Stephen Boyd, Abel Vesa, devicetree, festevam, kernel,
	Leonard Crestez, linux-arm-kernel, linux-clk, linux-kernel,
	linux-pm, mark.rutland, mturquette, rjw, robh+dt, s.hauer,
	shawnguo, viresh.kumar
  Cc: dl-linux-imx

Hi, Stephen

> Quoting Anson.Huang@nxp.com (2019-08-15 03:59:42)
> > diff --git a/drivers/clk/imx/clk-imx8mn.c
> > b/drivers/clk/imx/clk-imx8mn.c index ecd1062..3f1239a 100644
> > --- a/drivers/clk/imx/clk-imx8mn.c
> > +++ b/drivers/clk/imx/clk-imx8mn.c
> > @@ -82,6 +84,7 @@ static struct imx_pll14xx_clk imx8mn_dram_pll = {
> > static struct imx_pll14xx_clk imx8mn_arm_pll = {
> >                 .type = PLL_1416X,
> >                 .rate_table = imx8mn_pll1416x_tbl,
> > +               .rate_count = ARRAY_SIZE(imx8mn_pll1416x_tbl),
> 
> Why is rate_count added? That's not described in the commit text.

rate_count is necessary for table search during set_rate, it was missed previously,
I will add it into commit text in V2.

Thanks,
Anson.

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^ permalink raw reply	[flat|nested] 11+ messages in thread

* RE: [PATCH 5/6] clk: imx8mn: Add necessary frequency support for ARM PLL table
  2019-08-17 22:22     ` Anson Huang
@ 2019-08-18  1:11       ` Stephen Boyd
  2019-08-18  6:19         ` Anson Huang
  0 siblings, 1 reply; 11+ messages in thread
From: Stephen Boyd @ 2019-08-18  1:11 UTC (permalink / raw)
  To: devicetree, festevam, kernel, linux-arm-kernel, linux-clk,
	linux-kernel, linux-pm, mark.rutland, mturquette, rjw, robh+dt,
	s.hauer, shawnguo, viresh.kumar, Abel Vesa, Anson Huang,
	Leonard Crestez
  Cc: dl-linux-imx

Quoting Anson Huang (2019-08-17 15:22:01)
> Hi, Stephen
> 
> > Quoting Anson.Huang@nxp.com (2019-08-15 03:59:42)
> > > diff --git a/drivers/clk/imx/clk-imx8mn.c
> > > b/drivers/clk/imx/clk-imx8mn.c index ecd1062..3f1239a 100644
> > > --- a/drivers/clk/imx/clk-imx8mn.c
> > > +++ b/drivers/clk/imx/clk-imx8mn.c
> > > @@ -82,6 +84,7 @@ static struct imx_pll14xx_clk imx8mn_dram_pll = {
> > > static struct imx_pll14xx_clk imx8mn_arm_pll = {
> > >                 .type = PLL_1416X,
> > >                 .rate_table = imx8mn_pll1416x_tbl,
> > > +               .rate_count = ARRAY_SIZE(imx8mn_pll1416x_tbl),
> > 
> > Why is rate_count added? That's not described in the commit text.
> 
> rate_count is necessary for table search during set_rate, it was missed previously,
> I will add it into commit text in V2.
> 

Right, isn't that a more critical fix to make by itself instead of
rolling into this change that adds a few more frequencies?


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^ permalink raw reply	[flat|nested] 11+ messages in thread

* RE: [PATCH 5/6] clk: imx8mn: Add necessary frequency support for ARM PLL table
  2019-08-18  1:11       ` Stephen Boyd
@ 2019-08-18  6:19         ` Anson Huang
  0 siblings, 0 replies; 11+ messages in thread
From: Anson Huang @ 2019-08-18  6:19 UTC (permalink / raw)
  To: Stephen Boyd, devicetree, festevam, kernel, linux-arm-kernel,
	linux-clk, linux-kernel, linux-pm, mark.rutland, mturquette, rjw,
	robh+dt, s.hauer, shawnguo, viresh.kumar, Abel Vesa,
	Leonard Crestez
  Cc: dl-linux-imx

Hi, Stephen

> Quoting Anson Huang (2019-08-17 15:22:01)
> > Hi, Stephen
> >
> > > Quoting Anson.Huang@nxp.com (2019-08-15 03:59:42)
> > > > diff --git a/drivers/clk/imx/clk-imx8mn.c
> > > > b/drivers/clk/imx/clk-imx8mn.c index ecd1062..3f1239a 100644
> > > > --- a/drivers/clk/imx/clk-imx8mn.c
> > > > +++ b/drivers/clk/imx/clk-imx8mn.c
> > > > @@ -82,6 +84,7 @@ static struct imx_pll14xx_clk imx8mn_dram_pll =
> > > > { static struct imx_pll14xx_clk imx8mn_arm_pll = {
> > > >                 .type = PLL_1416X,
> > > >                 .rate_table = imx8mn_pll1416x_tbl,
> > > > +               .rate_count = ARRAY_SIZE(imx8mn_pll1416x_tbl),
> > >
> > > Why is rate_count added? That's not described in the commit text.
> >
> > rate_count is necessary for table search during set_rate, it was
> > missed previously, I will add it into commit text in V2.
> >
> 
> Right, isn't that a more critical fix to make by itself instead of rolling into this
> change that adds a few more frequencies?

Right, let me split this patch into two patches and resend the V2.

Thanks,
Anson.


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^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, back to index

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-15 10:59 [PATCH 1/6] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support Anson.Huang
2019-08-15 10:59 ` [PATCH 2/6] arm64: dts: imx8mn-ddr4-evk: Add rohm, bd71847 PMIC support Anson.Huang
2019-08-15 10:59 ` [PATCH 3/6] cpufreq: Use imx-cpufreq-dt for i.MX8MN's speed grading Anson.Huang
2019-08-15 10:59 ` [PATCH 4/6] cpufreq: imx-cpufreq-dt: Add i.MX8MN support Anson.Huang
2019-08-15 10:59 ` [PATCH 5/6] clk: imx8mn: Add necessary frequency support for ARM PLL table Anson.Huang
2019-08-17  3:52   ` Stephen Boyd
2019-08-17 22:22     ` Anson Huang
2019-08-18  1:11       ` Stephen Boyd
2019-08-18  6:19         ` Anson Huang
2019-08-15 10:59 ` [PATCH 6/6] arm64: dts: imx8mn: Add cpu-freq support Anson.Huang
2019-08-15 14:12 ` [PATCH 1/6] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support Leonard Crestez

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