From: Gerald BAEZA <gerald.baeza@st.com>
To: "will@kernel.org" <will@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mcoquelin.stm32@gmail.com" <mcoquelin.stm32@gmail.com>,
Alexandre TORGUE <alexandre.torgue@st.com>,
"corbet@lwn.net" <corbet@lwn.net>,
"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
"olof@lixom.net" <olof@lixom.net>,
"arnd@arndb.de" <arnd@arndb.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-stm32@st-md-mailman.stormreply.com"
<linux-stm32@st-md-mailman.stormreply.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>
Cc: Gerald BAEZA <gerald.baeza@st.com>
Subject: [PATCH v3 2/5] dt-bindings: perf: stm32: ddrperfm support
Date: Tue, 27 Aug 2019 15:08:19 +0000 [thread overview]
Message-ID: <1566918464-23927-3-git-send-email-gerald.baeza@st.com> (raw)
In-Reply-To: <1566918464-23927-1-git-send-email-gerald.baeza@st.com>
The DDRPERFM is the DDR Performance Monitor embedded in STM32MP1 SOC.
This documentation indicates how to enable stm32-ddr-pmu driver on
DDRPERFM peripheral, via the device tree.
Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
---
Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt
diff --git a/Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt b/Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt
new file mode 100644
index 0000000..87ab12e
--- /dev/null
+++ b/Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt
@@ -0,0 +1,16 @@
+* STM32 DDR Performance Monitor (DDRPERFM)
+
+Required properties:
+- compatible: must be "st,stm32-ddr-pmu".
+- reg: physical address and length of the registers set.
+- clocks: phandle and specifier for DDRPERFM input clock
+- resets: phandle and specifier for DDRPERFM reset
+
+Example:
+ ddrperfm: perf@5a007000 {
+ compatible = "st,stm32-ddr-pmu";
+ reg = <0x5a007000 0x400>;
+ clocks = <&rcc DDRPERFM>;
+ resets = <&rcc DDRPERFM_R>;
+ };
+
--
2.7.4
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next prev parent reply other threads:[~2019-08-27 15:09 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-27 15:08 [PATCH v3 0/5] stm32-ddr-pmu driver creation Gerald BAEZA
2019-08-27 15:08 ` [PATCH v3 1/5] Documentation: perf: stm32: ddrperfm support Gerald BAEZA
2019-08-27 15:08 ` Gerald BAEZA [this message]
2019-08-27 15:08 ` [PATCH v3 3/5] perf: stm32: ddrperfm driver creation Gerald BAEZA
2019-10-29 14:35 ` Will Deacon
2020-11-27 10:29 ` Gerald BAEZA
2019-08-27 15:08 ` [PATCH v3 4/5] ARM: configs: enable STM32_DDR_PMU Gerald BAEZA
2019-08-27 15:08 ` [PATCH v3 5/5] ARM: dts: stm32: add ddrperfm on stm32mp157c Gerald BAEZA
2019-08-29 8:48 ` Alexandre Torgue
2019-10-03 10:08 ` [PATCH v3 0/5] stm32-ddr-pmu driver creation Gerald BAEZA
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