From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D099C5ACAE for ; Thu, 12 Sep 2019 01:30:08 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5422920872 for ; Thu, 12 Sep 2019 01:30:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="lVJ0W2j0" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5422920872 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2VM+Fu9jk2u2e9+/4iP9/jz7HNK65SI3zusgSBg6nsg=; b=lVJ0W2j0HTxF+S +NGYfuOQP+6R9q9vDosFMEuvh54Gjt52RpqipTDzsGQytguF3XoCy6LkvnSP4wONTZsvK/WLP2gMR wrZbVQ6Kk/KCjOrbGHVvhiyGpWy01le758pBDx7A/AgsukDQh8EtVU4PpPeVPV4MpvIaXatqOgq9y KLwc4qOEnFUDRLkceYnwudtD3yPVOGF6IJubyBT/j4B+1PFx22+Gm6X4BFel6vGz/0X8Lx2Gy9Frc VE2HoaRlrifWKZStMkj3VjLH1ce0nCeQuuKjcbfp4nPtUDSXKhytMIbIsjLD7jFXWnet9Fh9VxVTF U2l3Iqp0O1kS/Bp6NUeg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.2 #3 (Red Hat Linux)) id 1i8Dvt-0000FE-AK; Thu, 12 Sep 2019 01:30:01 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.92.2 #3 (Red Hat Linux)) id 1i8Dvo-0000Cc-OF; Thu, 12 Sep 2019 01:29:59 +0000 X-UUID: 9aa8295b5b9049a9832e649dddf30118-20190911 X-UUID: 9aa8295b5b9049a9832e649dddf30118-20190911 Received: from mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1867697175; Wed, 11 Sep 2019 17:29:50 -0800 Received: from MTKMBS07N2.mediatek.inc (172.21.101.141) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 11 Sep 2019 18:29:48 -0700 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 12 Sep 2019 09:29:47 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 12 Sep 2019 09:29:47 +0800 Message-ID: <1568251787.13007.0.camel@mtksdaap41> Subject: Re: [RFC, v3, 1/4] dt-binding: mt8183: Add Mediatek MDP3 dt-bindings From: CK Hu To: Bibby Hsieh Date: Thu, 12 Sep 2019 09:29:47 +0800 In-Reply-To: <20190911093406.5688-2-bibby.hsieh@mediatek.com> References: <20190911093406.5688-1-bibby.hsieh@mediatek.com> <20190911093406.5688-2-bibby.hsieh@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190911_182956_800948_8A9EB1F7 X-CRM114-Status: GOOD ( 16.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent.pinchart+renesas@ideasonboard.com, Rynn.Wu@mediatek.com, Jerry-ch.Chen@mediatek.com, jungo.lin@mediatek.com, hans.verkuil@cisco.com, Ping-Hsun Wu , frederic.chen@mediatek.com, linux-media@vger.kernel.org, devicetree@vger.kernel.org, daoyuan huang , holmes.chiou@mediatek.com, sj.huang@mediatek.com, yuzhao@chromium.org, linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com, mchehab@kernel.org, linux-arm-kernel@lists.infradead.org, Sean.Cheng@mediatek.com, srv_heupstream@mediatek.com, tfiga@chromium.org, christie.yu@mediatek.com, zwisler@chromium.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Bibby: On Wed, 2019-09-11 at 17:34 +0800, Bibby Hsieh wrote: > From: daoyuan huang > > This patch adds DT binding document for Media Data Path 3 (MDP3) > a unit in multimedia system used for scaling and color format convert. > > Signed-off-by: Ping-Hsun Wu > Signed-off-by: daoyuan huang > --- > .../bindings/media/mediatek,mt8183-mdp3.txt | 201 ++++++++++++++++++ > 1 file changed, 201 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt > > diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt b/Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt > new file mode 100644 > index 000000000000..0d15326d12c1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt > @@ -0,0 +1,201 @@ > +* Mediatek Media Data Path 3 > + > +Media Data Path 3 (MDP3) is used for scaling and color space conversion. > + > +Required properties (controller node): > +- compatible: "mediatek,mt8183-mdp" > +- mediatek,scp: the node of system control processor (SCP), using the > + remoteproc & rpmsg framework, see > + Documentation/devicetree/bindings/remoteproc/mtk,scp.txt for details. > +- mediatek,mmsys: the node of mux(multiplexer) controller for HW connections. > +- mediatek,mm-mutex: the node of sof(start of frame) signal controller. > +- mediatek,mailbox-gce: the node of global command engine (GCE), used to > + read/write registers with critical time limitation, see > + Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details. > +- mboxes: mailbox number used to communicate with GCE. > +- gce-subsys: sub-system id corresponding to the register address. > +- gce-event-names: in use event name list, used to correspond to event IDs. > +- gce-events: in use event IDs list, all IDs are defined in > + 'dt-bindings/gce/mt8183-gce.h'. > + > +Required properties (all function blocks, child node): > +- compatible: Should be one of > + "mediatek,mt8183-mdp-rdma" - read DMA > + "mediatek,mt8183-mdp-rsz" - resizer > + "mediatek,mt8183-mdp-wdma" - write DMA > + "mediatek,mt8183-mdp-wrot" - write DMA with rotation > + "mediatek,mt8183-mdp-ccorr" - color correction with 3X3 matrix > +- reg: Physical base address and length of the function block register space > +- clocks: device clocks, see > + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. > +- power-domains: a phandle to the power domain, see > + Documentation/devicetree/bindings/power/power_domain.txt for details. > +- mediatek,mdp-id: HW index to distinguish same functionality modules. > + > +Required properties (DMA function blocks, child node): > +- compatible: Should be one of > + "mediatek,mt8183-mdp-rdma" > + "mediatek,mt8183-mdp-wdma" > + "mediatek,mt8183-mdp-wrot" > +- iommus: should point to the respective IOMMU block with master port as > + argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > + for details. > +- mediatek,larb: must contain the local arbiters in the current Socs, see > + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt > + for details. > + > +Required properties (input path selection node): > +- compatible: > + "mediatek,mt8183-mdp-dl" - MDP direct link input source selection > +- reg: Physical base address and length of the function block register space > +- clocks: device clocks, see > + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. > +- mediatek,mdp-id: HW index to distinguish same functionality modules. > + > +Required properties (ISP PASS2 (DIP) module path selection node): > +- compatible: > + "mediatek,mt8183-mdp-imgi" - input DMA of ISP PASS2 (DIP) module for raw image input > +- reg: Physical base address and length of the function block register space > +- mediatek,mdp-id: HW index to distinguish same functionality modules. > + > +Required properties (SW node): > +- compatible: Should be one of > + "mediatek,mt8183-mdp-exto" - output DMA of ISP PASS2 (DIP) module for yuv image output > + "mediatek,mt8183-mdp-path" - MDP output path selection > +- mediatek,mdp-id: HW index to distinguish same functionality modules. > + > +Example: > + mdp_camin@14000000 { > + compatible = "mediatek,mt8183-mdp-dl"; > + mediatek,mdp-id = <0>; > + reg = <0 0x14000000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; > + clocks = <&mmsys CLK_MM_MDP_DL_TXCK>, > + <&mmsys CLK_MM_MDP_DL_RX>; > + }; > + > + mdp_camin2@14000000 { > + compatible = "mediatek,mt8183-mdp-dl"; > + mediatek,mdp-id = <1>; > + reg = <0 0x14000000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; > + clocks = <&mmsys CLK_MM_IPU_DL_TXCK>, > + <&mmsys CLK_MM_IPU_DL_RX>; > + }; In [1], mmsys, mdp_camin, mdp_camin2 are at the same address (0x14000000), so these three should be only one device (mmsys device [2]). As I know, mmsys provide display clock control, display routing, mdp clock control and mdp routing, but the binding just show the clock part. I guess mdp_camin and mdp_camin2 here are the mdp routing part of mmsys, so this should be moved to mmsys binding. [1] https://patchwork.kernel.org/patch/11140747/ [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt?h=v5.3-rc8 Regards, CK > + > + mdp_rdma0: mdp_rdma0@14001000 { > + compatible = "mediatek,mt8183-mdp-rdma", > + "mediatek,mt8183-mdp3"; > + mediatek,scp = <&scp>; > + mediatek,mdp-id = <0>; > + reg = <0 0x14001000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_MDP_RDMA0>, > + <&mmsys CLK_MM_MDP_RSZ1>; > + iommus = <&iommu M4U_PORT_MDP_RDMA0>; > + mediatek,larb = <&larb0>; > + mediatek,mmsys = <&mmsys>; > + mediatek,mm-mutex = <&mutex>; > + mediatek,mailbox-gce = <&gce>; > + mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST 0>, > + <&gce 21 CMDQ_THR_PRIO_LOWEST 0>, > + <&gce 22 CMDQ_THR_PRIO_LOWEST 0>, > + <&gce 23 CMDQ_THR_PRIO_LOWEST 0>; > + gce-subsys = <&gce 0x14000000 SUBSYS_1400XXXX>, > + <&gce 0x14010000 SUBSYS_1401XXXX>, > + <&gce 0x14020000 SUBSYS_1402XXXX>, > + <&gce 0x15020000 SUBSYS_1502XXXX>; > + mediatek,gce-events = , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; > + }; > + > + mdp_imgi@15020000 { > + compatible = "mediatek,mt8183-mdp-imgi"; > + mediatek,mdp-id = <0>; > + reg = <0 0x15020000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1502XXXX 0 0x1000>; > + }; > + > + mdp_img2o@15020000 { > + compatible = "mediatek,mt8183-mdp-exto"; > + mediatek,mdp-id = <1>; > + }; > + > + mdp_rsz0: mdp_rsz0@14003000 { > + compatible = "mediatek,mt8183-mdp-rsz"; > + mediatek,mdp-id = <0>; > + reg = <0 0x14003000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>; > + clocks = <&mmsys CLK_MM_MDP_RSZ0>; > + }; > + > + mdp_rsz1: mdp_rsz1@14004000 { > + compatible = "mediatek,mt8183-mdp-rsz"; > + mediatek,mdp-id = <1>; > + reg = <0 0x14004000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x4000 0x1000>; > + clocks = <&mmsys CLK_MM_MDP_RSZ1>; > + }; > + > + mdp_wrot0: mdp_wrot0@14005000 { > + compatible = "mediatek,mt8183-mdp-wrot"; > + mediatek,mdp-id = <0>; > + reg = <0 0x14005000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; > + clocks = <&mmsys CLK_MM_MDP_WROT0>; > + iommus = <&iommu M4U_PORT_MDP_WROT0>; > + mediatek,larb = <&larb0>; > + }; > + > + mdp_path0_sout@14005000 { > + compatible = "mediatek,mt8183-mdp-path"; > + mediatek,mdp-id = <0>; > + }; > + > + mdp_wdma: mdp_wdma@14006000 { > + compatible = "mediatek,mt8183-mdp-wdma"; > + mediatek,mdp-id = <0>; > + reg = <0 0x14006000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>; > + clocks = <&mmsys CLK_MM_MDP_WDMA0>; > + iommus = <&iommu M4U_PORT_MDP_WDMA0>; > + mediatek,larb = <&larb0>; > + }; > + > + mdp_path1_sout@14006000 { > + compatible = "mediatek,mt8183-mdp-path"; > + mediatek,mdp-id = <1>; > + }; > + > + mdp_ccorr: mdp_ccorr@1401c000 { > + compatible = "mediatek,mt8183-mdp-ccorr"; > + mediatek,mdp-id = <0>; > + reg = <0 0x1401c000 0 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000 0x1000>; > + clocks = <&mmsys CLK_MM_MDP_CCORR>; > + }; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel