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From: Philipp Zabel <p.zabel@pengutronix.de>
To: Guenter Roeck <linux@roeck-us.net>,
	Yingjoe Chen <yingjoe.chen@mediatek.com>
Cc: mark.rutland@arm.com, alsa-devel@alsa-project.org,
	broonie@kernel.org, yong.liang@mediatek.com,
	Jiaxin Yu <jiaxin.yu@mediatek.com>,
	lgirdwood@gmail.com, tzungbi@google.com, robh+dt@kernel.org,
	linux-mediatek@lists.infradead.org, eason.yen@mediatek.com,
	perex@perex.cz, wim@linux-watchdog.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 2/4] watchdog: mtk_wdt: mt8183: Add reset controller
Date: Tue, 08 Oct 2019 16:08:39 +0200	[thread overview]
Message-ID: <1570543719.18914.7.camel@pengutronix.de> (raw)
In-Reply-To: <70b77fb3-7186-734d-3415-64acb30bab8f@roeck-us.net>

Hi Guenter, Yingjoe,

On Sat, 2019-10-05 at 07:46 -0700, Guenter Roeck wrote:
> On 10/4/19 10:59 PM, Yingjoe Chen wrote:
> > On Thu, 2019-10-03 at 06:49 -0700, Guenter Roeck wrote:
> > > On 9/27/19 3:31 AM, Jiaxin Yu wrote:
> > 
> > <snip..>
> > 
> > 
> > > > +static int toprgu_reset_assert(struct reset_controller_dev *rcdev,
> > > > +			       unsigned long id)
> > > > +{
> > > > +	unsigned int tmp;
> > > > +	unsigned long flags;
> > > > +	struct toprgu_reset *data = container_of(rcdev,
> > > > +				struct toprgu_reset, rcdev);
> > > > +
> > > > +	spin_lock_irqsave(&data->lock, flags);
> > > > +
> > > > +	tmp = __raw_readl(data->toprgu_swrst_base + data->regofs);
> > > > +	tmp |= BIT(id);
> > > > +	tmp |= WDT_SWSYS_RST_KEY;
> > > > +	writel(tmp, data->toprgu_swrst_base + data->regofs);
> > > > +
> > > > +	spin_unlock_irqrestore(&data->lock, flags);
> > > > +
> > > > +	return 0;
> > > > +}
> > > > +
> > > > +static int toprgu_reset_deassert(struct reset_controller_dev *rcdev,
> > > > +				 unsigned long id)
> > > > +{
> > > > +	unsigned int tmp;
> > > > +	unsigned long flags;
> > > > +	struct toprgu_reset *data = container_of(rcdev,
> > > > +					struct toprgu_reset, rcdev);
> > > > +
> > > > +	spin_lock_irqsave(&data->lock, flags);
> > > > +
> > > > +	tmp = __raw_readl(data->toprgu_swrst_base + data->regofs);
> > > > +	tmp &= ~BIT(id);
> > > > +	tmp |= WDT_SWSYS_RST_KEY;
> > > > +	writel(tmp, data->toprgu_swrst_base + data->regofs);
> > > > +
> > > > +	spin_unlock_irqrestore(&data->lock, flags);
> > > > +
> > > > +	return 0;
> > > > +}
> > > > +
> > > > +static int toprgu_reset(struct reset_controller_dev *rcdev,
> > > > +			unsigned long id)
> > > > +{
> > > > +	int ret;
> > > > +
> > > > +	ret = toprgu_reset_assert(rcdev, id);
> > > > +	if (ret)
> > > > +		return ret;
> > > > +
> > > > +	return toprgu_reset_deassert(rcdev, id);
> > > 
> > > Unless there is additional synchronization elsewhere, parallel calls
> > > to the -> assert, and ->reset callbacks may result in the reset being
> > > deasserted while at least one caller (the one who called the ->assert
> > > function) believes that it is still asserted.
> > > 
> > > [ ... and if there _is_ additional synchronization elsewhere, the
> > >     local spinlock would be unnecessary ]
> > > 
> > 
> > I'm not sure if this count as additional synchronization, but you could
> > get exclusive control to the reset by calling
> > reset_control_get_exclusive so others won't try to reset the component
> > while you are using it.
> > 
> > In this case, you still need spinlock because other drivers might trying
> > to reset their components and they share same register.
> 
> That isn't what I meant. I referred to synchronization in the reset
> controller core. AFAICS the reset controller core prevents parallel
> calls into the same reset controller driver using atomics.

No, it doesn't. The atomics in struct reset_control prevent parallel
calls on the same, reset control only, for shared reset controls.
Two calls on different reset controls can still run simultaneously on
the same rcdev.

> Unfortunately, it is not well defined if additional synchronization on
> driver level is needed - some drivers implement it, some drivers
> don't,

I think all drivers protect read/modify/write cycles to shared registers
with a spinlock. Those that don't either have separate set/clear
registers or use regmap, otherwise it might be a bug.

> and I don't find a documentation.

I am aware this is a problem.

regards
Philipp

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  reply	other threads:[~2019-10-08 14:09 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-27 10:31 [PATCH v2 0/4] ASoC: mt8183: fix audio playback slowly after playback Jiaxin Yu
2019-09-27 10:31 ` [PATCH v2 1/4] dt-bindings: mediatek: mt8183: Add #reset-cells Jiaxin Yu
2019-09-27 10:31 ` [PATCH v2 2/4] watchdog: mtk_wdt: mt8183: Add reset controller Jiaxin Yu
2019-09-28 17:49   ` Guenter Roeck
2019-09-30  8:17     ` Yingjoe Chen
2019-10-03 13:49   ` Guenter Roeck
2019-10-05  5:59     ` Yingjoe Chen
2019-10-05 14:46       ` Guenter Roeck
2019-10-08 14:08         ` Philipp Zabel [this message]
2019-10-05  5:50   ` Yingjoe Chen
2019-09-27 10:31 ` [PATCH v2 3/4] dt-bindings: medaitek: mt8183: add property "resets" && "reset-names" Jiaxin Yu
2019-10-08 12:53   ` Applied "dt-bindings: medaitek: mt8183: add property "resets" && "reset-names"" to the asoc tree Mark Brown
2019-09-27 10:31 ` [PATCH v2 4/4] ASoC: mt8183: fix audio playback slowly after playback during bootup Jiaxin Yu
2019-10-05  6:07   ` Yingjoe Chen
2019-10-08 12:11   ` Mark Brown
2019-10-08 12:53   ` Applied "ASoC: mt8183: fix audio playback slowly after playback during bootup" to the asoc tree Mark Brown

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