From: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
To: MyungJoo Ham <myungjoo.ham@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
"Rob Herring" <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Viresh Kumar <viresh.kumar@linaro.org>,
Nishanth Menon <nm@ti.com>, "Stephen Boyd" <sboyd@kernel.org>
Cc: devicetree@vger.kernel.org,
"Andrew-sh.Cheng" <andrew-sh.cheng@mediatek.com>,
srv_heupstream@mediatek.com, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, fan.chen@mediatek.com,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [v5, PATCH 4/5] cpufreq: mediatek: add opp notification for SVS support
Date: Tue, 26 Nov 2019 19:50:45 +0800 [thread overview]
Message-ID: <1574769046-28449-5-git-send-email-andrew-sh.cheng@mediatek.com> (raw)
In-Reply-To: <1574769046-28449-1-git-send-email-andrew-sh.cheng@mediatek.com>
From: "Andrew-sh.Cheng" <andrew-sh.cheng@mediatek.com>
cpufreq should listen opp notification and do proper actions
when receiving disable and voltage adjustment events,
which are triggered when SVS is enabled.
Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
---
drivers/cpufreq/mediatek-cpufreq.c | 79 ++++++++++++++++++++++++++++++++++++++
1 file changed, 79 insertions(+)
diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c
index 4b0cc50dd93b..7c37ab31230a 100644
--- a/drivers/cpufreq/mediatek-cpufreq.c
+++ b/drivers/cpufreq/mediatek-cpufreq.c
@@ -42,6 +42,10 @@ struct mtk_cpu_dvfs_info {
struct list_head list_head;
int intermediate_voltage;
bool need_voltage_tracking;
+ struct mutex lock; /* avoid notify and policy race condition */
+ struct notifier_block opp_nb;
+ int opp_cpu;
+ unsigned long opp_freq;
};
static LIST_HEAD(dvfs_info_list);
@@ -231,6 +235,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy,
vproc = dev_pm_opp_get_voltage(opp);
dev_pm_opp_put(opp);
+ mutex_lock(&info->lock);
/*
* If the new voltage or the intermediate voltage is higher than the
* current voltage, scale up voltage first.
@@ -242,6 +247,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy,
pr_err("cpu%d: failed to scale up voltage!\n",
policy->cpu);
mtk_cpufreq_set_voltage(info, old_vproc);
+ mutex_unlock(&info->lock);
return ret;
}
}
@@ -253,6 +259,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy,
policy->cpu);
mtk_cpufreq_set_voltage(info, old_vproc);
WARN_ON(1);
+ mutex_unlock(&info->lock);
return ret;
}
@@ -263,6 +270,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy,
policy->cpu);
clk_set_parent(cpu_clk, armpll);
mtk_cpufreq_set_voltage(info, old_vproc);
+ mutex_unlock(&info->lock);
return ret;
}
@@ -273,6 +281,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy,
policy->cpu);
mtk_cpufreq_set_voltage(info, inter_vproc);
WARN_ON(1);
+ mutex_unlock(&info->lock);
return ret;
}
@@ -288,15 +297,75 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy,
clk_set_parent(cpu_clk, info->inter_clk);
clk_set_rate(armpll, old_freq_hz);
clk_set_parent(cpu_clk, armpll);
+ mutex_unlock(&info->lock);
return ret;
}
}
+ info->opp_freq = freq_hz;
+ mutex_unlock(&info->lock);
+
return 0;
}
#define DYNAMIC_POWER "dynamic-power-coefficient"
+static int mtk_cpufreq_opp_notifier(struct notifier_block *nb,
+ unsigned long event, void *data)
+{
+ struct dev_pm_opp *opp = data;
+ struct dev_pm_opp *opp_item;
+ struct mtk_cpu_dvfs_info *info =
+ container_of(nb, struct mtk_cpu_dvfs_info, opp_nb);
+ unsigned long freq, volt;
+ struct cpufreq_policy *policy;
+ int ret = 0;
+
+ if (event == OPP_EVENT_ADJUST_VOLTAGE) {
+ freq = dev_pm_opp_get_freq(opp);
+
+ mutex_lock(&info->lock);
+ if (info->opp_freq == freq) {
+ volt = dev_pm_opp_get_voltage(opp);
+ ret = mtk_cpufreq_set_voltage(info, volt);
+ if (ret)
+ dev_err(info->cpu_dev, "failed to scale voltage: %d\n",
+ ret);
+ }
+ mutex_unlock(&info->lock);
+ } else if (event == OPP_EVENT_DISABLE) {
+ freq = info->opp_freq;
+ opp_item = dev_pm_opp_find_freq_ceil(info->cpu_dev, &freq);
+ if (!IS_ERR(opp_item))
+ dev_pm_opp_put(opp_item);
+ else
+ freq = 0;
+
+ /* case of current opp is disabled */
+ if (freq == 0 || freq != info->opp_freq) {
+ // find an enable opp item
+ freq = 1;
+ opp_item = dev_pm_opp_find_freq_ceil(info->cpu_dev,
+ &freq);
+ if (!IS_ERR(opp_item)) {
+ dev_pm_opp_put(opp_item);
+ policy = cpufreq_cpu_get(info->opp_cpu);
+ if (policy) {
+ cpufreq_driver_target(policy,
+ freq / 1000,
+ CPUFREQ_RELATION_L);
+ cpufreq_cpu_put(policy);
+ }
+ } else {
+ pr_err("%s: all opp items are disabled\n",
+ __func__);
+ }
+ }
+ }
+
+ return notifier_from_errno(ret);
+}
+
static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
{
struct device *cpu_dev;
@@ -383,11 +452,21 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
info->intermediate_voltage = dev_pm_opp_get_voltage(opp);
dev_pm_opp_put(opp);
+ info->opp_cpu = cpu;
+ info->opp_nb.notifier_call = mtk_cpufreq_opp_notifier;
+ ret = dev_pm_opp_register_notifier(cpu_dev, &info->opp_nb);
+ if (ret) {
+ pr_warn("cannot register opp notification\n");
+ goto out_free_opp_table;
+ }
+
+ mutex_init(&info->lock);
info->cpu_dev = cpu_dev;
info->proc_reg = proc_reg;
info->sram_reg = IS_ERR(sram_reg) ? NULL : sram_reg;
info->cpu_clk = cpu_clk;
info->inter_clk = inter_clk;
+ info->opp_freq = clk_get_rate(cpu_clk);
/*
* If SRAM regulator is present, software "voltage tracking" is needed
--
2.12.5
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next prev parent reply other threads:[~2019-11-26 11:52 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20191126115058epcas1p3caa6da2508caa5fbe71c202834184b15@epcas1p3.samsung.com>
2019-11-26 11:50 ` [v5, PATCH 0/5] Add cpufreq and cci devfreq for mt8183, and SVS support Andrew-sh.Cheng
2019-11-26 11:50 ` [v5, PATCH 1/5] cpufreq: mediatek: add clock enable for intermediate clock Andrew-sh.Cheng
2019-11-26 11:50 ` [v5, PATCH 2/5] dt-bindings: devfreq: add compatible for mt8183 cci devfreq Andrew-sh.Cheng
2019-12-17 2:38 ` Chanwoo Choi
2019-11-26 11:50 ` [v5, PATCH 3/5] devfreq: add mediatek " Andrew-sh.Cheng
2019-12-17 10:08 ` Chanwoo Choi
2019-11-26 11:50 ` Andrew-sh.Cheng [this message]
2019-11-27 8:36 ` [v5, PATCH 4/5] cpufreq: mediatek: add opp notification for SVS support Viresh Kumar
2019-12-09 6:56 ` andrew-sh.cheng
2019-12-10 6:43 ` Viresh Kumar
2020-03-10 8:11 ` andrew-sh.cheng
2020-03-11 6:06 ` Viresh Kumar
2020-03-12 9:12 ` andrew-sh.cheng
2020-03-13 7:22 ` andrew-sh.cheng
2020-03-13 9:10 ` Viresh Kumar
2020-04-06 9:12 ` andrew-sh.cheng
2020-04-06 9:29 ` Viresh Kumar
2020-04-07 6:54 ` andrew-sh.cheng
2020-04-07 8:29 ` Viresh Kumar
2020-04-07 9:09 ` andrew-sh.cheng
2019-11-26 11:50 ` [v5, PATCH 5/5] devfreq: mediatek: cci devfreq register " Andrew-sh.Cheng
2019-12-17 7:31 ` [v5, PATCH 0/5] Add cpufreq and cci devfreq for mt8183, and " Chanwoo Choi
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