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From: Jolly Shah <jolly.shah@xilinx.com>
To: ard.biesheuvel@linaro.org, mingo@kernel.org,
	gregkh@linuxfoundation.org, matt@codeblueprint.co.uk,
	sudeep.holla@arm.com, hkallweit1@gmail.com,
	keescook@chromium.org, dmitry.torokhov@gmail.com,
	michal.simek@xilinx.com
Cc: Jolly Shah <jolly.shah@xilinx.com>,
	Rajan Vaja <rajan.vaja@xilinx.com>,
	rajanv@xilinx.com, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 19/24] firmware: xilinx: Remove eemi ops for fpga related APIs
Date: Fri,  6 Mar 2020 15:47:27 -0800	[thread overview]
Message-ID: <1583538452-1992-20-git-send-email-jolly.shah@xilinx.com> (raw)
In-Reply-To: <1583538452-1992-1-git-send-email-jolly.shah@xilinx.com>

From: Rajan Vaja <rajan.vaja@xilinx.com>

Use direct function call instead of using eemi ops for fpga related
APIs. Also remove eemi ops structure.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
---
 drivers/firmware/xilinx/zynqmp.c     | 30 ++----------------------------
 drivers/fpga/zynqmp-fpga.c           | 12 ++----------
 drivers/spi/spi-zynqmp-gqspi.c       |  5 -----
 include/linux/firmware/xlnx-zynqmp.h | 16 ++--------------
 4 files changed, 6 insertions(+), 57 deletions(-)

diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index 7426533..36d5a3e 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -24,8 +24,6 @@
 #include <linux/firmware/xlnx-zynqmp.h>
 #include "zynqmp-debug.h"
 
-static const struct zynqmp_eemi_ops *eemi_ops_tbl;
-
 static bool feature_check_enabled;
 static u32 zynqmp_pm_features[PM_API_MAX];
 
@@ -654,8 +652,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
  *
  * Return: Returns status, either success or error+reason
  */
-static int zynqmp_pm_fpga_load(const u64 address, const u32 size,
-			       const u32 flags)
+int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
 {
 	return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
 				   upper_32_bits(address), size, flags, NULL);
@@ -670,7 +667,7 @@ static int zynqmp_pm_fpga_load(const u64 address, const u32 size,
  *
  * Return: Returns status, either success or error+reason
  */
-static int zynqmp_pm_fpga_get_status(u32 *value)
+int zynqmp_pm_fpga_get_status(u32 *value)
 {
 	u32 ret_payload[PAYLOAD_ARG_CNT];
 	int ret;
@@ -770,26 +767,6 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
 }
 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
 
-static const struct zynqmp_eemi_ops eemi_ops = {
-	.fpga_load = zynqmp_pm_fpga_load,
-	.fpga_get_status = zynqmp_pm_fpga_get_status,
-};
-
-/**
- * zynqmp_pm_get_eemi_ops - Get eemi ops functions
- *
- * Return: Pointer of eemi_ops structure
- */
-const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void)
-{
-	if (eemi_ops_tbl)
-		return eemi_ops_tbl;
-	else
-		return ERR_PTR(-EPROBE_DEFER);
-
-}
-EXPORT_SYMBOL_GPL(zynqmp_pm_get_eemi_ops);
-
 static int zynqmp_firmware_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -836,9 +813,6 @@ static int zynqmp_firmware_probe(struct platform_device *pdev)
 	pr_info("%s Trustzone version v%d.%d\n", __func__,
 		pm_tz_version >> 16, pm_tz_version & 0xFFFF);
 
-	/* Assign eemi_ops_table */
-	eemi_ops_tbl = &eemi_ops;
-
 	zynqmp_pm_api_debugfs_init();
 
 	ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
diff --git a/drivers/fpga/zynqmp-fpga.c b/drivers/fpga/zynqmp-fpga.c
index b8a88d2..5be8685 100644
--- a/drivers/fpga/zynqmp-fpga.c
+++ b/drivers/fpga/zynqmp-fpga.c
@@ -40,16 +40,12 @@ static int zynqmp_fpga_ops_write_init(struct fpga_manager *mgr,
 static int zynqmp_fpga_ops_write(struct fpga_manager *mgr,
 				 const char *buf, size_t size)
 {
-	const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops();
 	struct zynqmp_fpga_priv *priv;
 	dma_addr_t dma_addr;
 	u32 eemi_flags = 0;
 	char *kbuf;
 	int ret;
 
-	if (IS_ERR_OR_NULL(eemi_ops) || !eemi_ops->fpga_load)
-		return -ENXIO;
-
 	priv = mgr->priv;
 
 	kbuf = dma_alloc_coherent(priv->dev, size, &dma_addr, GFP_KERNEL);
@@ -63,7 +59,7 @@ static int zynqmp_fpga_ops_write(struct fpga_manager *mgr,
 	if (priv->flags & FPGA_MGR_PARTIAL_RECONFIG)
 		eemi_flags |= XILINX_ZYNQMP_PM_FPGA_PARTIAL;
 
-	ret = eemi_ops->fpga_load(dma_addr, size, eemi_flags);
+	ret = zynqmp_pm_fpga_load(dma_addr, size, eemi_flags);
 
 	dma_free_coherent(priv->dev, size, kbuf, dma_addr);
 
@@ -78,13 +74,9 @@ static int zynqmp_fpga_ops_write_complete(struct fpga_manager *mgr,
 
 static enum fpga_mgr_states zynqmp_fpga_ops_state(struct fpga_manager *mgr)
 {
-	const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops();
 	u32 status;
 
-	if (IS_ERR_OR_NULL(eemi_ops) || !eemi_ops->fpga_get_status)
-		return FPGA_MGR_STATE_UNKNOWN;
-
-	eemi_ops->fpga_get_status(&status);
+	zynqmp_pm_fpga_get_status(&status);
 	if (status & IXR_FPGA_DONE_MASK)
 		return FPGA_MGR_STATE_OPERATING;
 
diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c
index 7412a30..811c97a 100644
--- a/drivers/spi/spi-zynqmp-gqspi.c
+++ b/drivers/spi/spi-zynqmp-gqspi.c
@@ -135,7 +135,6 @@
 
 #define SPI_AUTOSUSPEND_TIMEOUT		3000
 enum mode_type {GQSPI_MODE_IO, GQSPI_MODE_DMA};
-static const struct zynqmp_eemi_ops *eemi_ops;
 
 /**
  * struct zynqmp_qspi - Defines qspi driver instance
@@ -1015,10 +1014,6 @@ static int zynqmp_qspi_probe(struct platform_device *pdev)
 	struct zynqmp_qspi *xqspi;
 	struct device *dev = &pdev->dev;
 
-	eemi_ops = zynqmp_pm_get_eemi_ops();
-	if (IS_ERR(eemi_ops))
-		return PTR_ERR(eemi_ops);
-
 	master = spi_alloc_master(&pdev->dev, sizeof(*xqspi));
 	if (!master)
 		return -ENOMEM;
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 3135d62..1734d12 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -285,11 +285,6 @@ struct zynqmp_pm_query_data {
 	u32 arg3;
 };
 
-struct zynqmp_eemi_ops {
-	int (*fpga_load)(const u64 address, const u32 size, const u32 flags);
-	int (*fpga_get_status)(u32 *value);
-};
-
 int zynqmp_pm_get_api_version(u32 *version);
 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version);
 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out);
@@ -318,16 +313,9 @@ int zynqmp_pm_release_node(const u32 node);
 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
 			      const u32 qos,
 			      const enum zynqmp_pm_request_ack ack);
+int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags);
+int zynqmp_pm_fpga_get_status(u32 *value);
 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
 			u32 arg2, u32 arg3, u32 *ret_payload);
 
-#if IS_REACHABLE(CONFIG_ARCH_ZYNQMP)
-const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void);
-#else
-static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void)
-{
-	return ERR_PTR(-ENODEV);
-}
-#endif
-
 #endif /* __FIRMWARE_ZYNQMP_H__ */
-- 
2.7.4


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  parent reply	other threads:[~2020-03-06 23:48 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-06 23:47 [PATCH v3 00/24] firmware: xilinx: Add xilinx specific sysfs interface Jolly Shah
2020-03-06 23:47 ` [PATCH v3 01/24] firmware: xilinx: Remove eemi ops for get_api_version Jolly Shah
2020-03-06 23:47 ` [PATCH v3 02/24] firmware: xilinx: Remove eemi ops for get_chipid Jolly Shah
2020-03-06 23:47 ` [PATCH v3 03/24] firmware: xilinx: Remove eemi ops for query_data Jolly Shah
2020-03-06 23:47 ` [PATCH v3 04/24] firmware: xilinx: Remove eemi ops for clock_enable Jolly Shah
2020-03-06 23:47 ` [PATCH v3 05/24] firmware: xilinx: Remove eemi ops for clock_disable Jolly Shah
2020-03-06 23:47 ` [PATCH v3 06/24] firmware: xilinx: Remove eemi ops for clock_getstate Jolly Shah
2020-03-06 23:47 ` [PATCH v3 07/24] firmware: xilinx: Remove eemi ops for clock_setdivider Jolly Shah
2020-03-06 23:47 ` [PATCH v3 08/24] firmware: xilinx: Remove eemi ops for clock_getdivider Jolly Shah
2020-03-06 23:47 ` [PATCH v3 09/24] firmware: xilinx: Remove eemi ops for clock set/get rate Jolly Shah
2020-03-06 23:47 ` [PATCH v3 10/24] firmware: xilinx: Remove eemi ops for clock set/get parent Jolly Shah
2020-03-06 23:47 ` [PATCH v3 11/24] firmware: xilinx: Use APIs instead of IOCTLs Jolly Shah
2020-03-06 23:47 ` [PATCH v3 12/24] firmware: xilinx: Remove eemi ops for reset_assert Jolly Shah
2020-03-06 23:47 ` [PATCH v3 13/24] firmware: xilinx: Remove eemi ops for reset_get_status Jolly Shah
2020-03-06 23:47 ` [PATCH v3 14/24] firmware: xilinx: Remove eemi ops for init_finalize Jolly Shah
2020-03-06 23:47 ` [PATCH v3 15/24] firmware: xilinx: Remove eemi ops for set_suspend_mode Jolly Shah
2020-03-06 23:47 ` [PATCH v3 16/24] firmware: xilinx: Remove eemi ops for request_node Jolly Shah
2020-03-06 23:47 ` [PATCH v3 17/24] firmware: xilinx: Remove eemi ops for release_node Jolly Shah
2020-03-06 23:47 ` [PATCH v3 18/24] firmware: xilinx: Remove eemi ops for set_requirement Jolly Shah
2020-03-06 23:47 ` Jolly Shah [this message]
2020-03-06 23:47 ` [PATCH v3 20/24] firmware: xilinx: Add APIs to read/write GGS/PGGS registers Jolly Shah
2020-03-18 11:51   ` Greg KH
2020-03-18 12:41     ` Rajan Vaja
2020-03-18 12:50       ` Greg KH
2020-03-06 23:47 ` [PATCH v3 21/24] firmware: xilinx: Add sysfs interface Jolly Shah
2020-03-18 11:51   ` Greg KH
2020-03-06 23:47 ` [PATCH v3 22/24] firmware: xilinx: Add system shutdown API interface Jolly Shah
2020-03-18 11:52   ` Greg KH
2020-03-06 23:47 ` [PATCH v3 23/24] firmware: xilinx: Add sysfs to set shutdown scope Jolly Shah
2020-03-18 11:53   ` Greg KH
2020-03-06 23:47 ` [PATCH v3 24/24] firmware: xilinx: Add sysfs and API to set boot health status Jolly Shah
2020-03-18 11:53   ` Greg KH
2020-03-18 11:54 ` [PATCH v3 00/24] firmware: xilinx: Add xilinx specific sysfs interface Greg KH
2020-04-09 19:17   ` Jolly Shah

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