From: Srinath Mannam <srinath.mannam@broadcom.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Ray Jui <rjui@broadcom.com>, Rob Herring <robh+dt@kernel.org>,
Andrew Murray <andrew.murray@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Andy Shevchenko <andy.shevchenko@gmail.com>,
Arnd Bergmann <arnd@arndb.de>
Cc: devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
Srinath Mannam <srinath.mannam@broadcom.com>,
linux-kernel@vger.kernel.org, Ray Jui <ray.jui@broadcom.com>,
bcm-kernel-feedback-list@broadcom.com,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 6/6] arm64: dts: Change PCIe INTx mapping for NS2
Date: Thu, 26 Mar 2020 12:18:46 +0530 [thread overview]
Message-ID: <1585205326-25326-7-git-send-email-srinath.mannam@broadcom.com> (raw)
In-Reply-To: <1585205326-25326-1-git-send-email-srinath.mannam@broadcom.com>
From: Ray Jui <ray.jui@broadcom.com>
Change the PCIe INTx mapping to model the 4 INTx interrupts in the
IRQ domain of the iProc PCIe controller itself.
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
---
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 28 ++++++++++++++++++++----
1 file changed, 24 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
index 15f7b0e..489bfd5 100644
--- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
@@ -117,8 +117,11 @@
dma-coherent;
#interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie0_intc 0>,
+ <0 0 0 2 &pcie0_intc 1>,
+ <0 0 0 3 &pcie0_intc 2>,
+ <0 0 0 4 &pcie0_intc 3>;
linux,pci-domain = <0>;
@@ -140,6 +143,13 @@
phy-names = "pcie-phy";
msi-parent = <&v2m0>;
+ pcie0_intc: interrupt-controller {
+ compatible = "brcm,iproc-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
pcie4: pcie@50020000 {
@@ -148,8 +158,11 @@
dma-coherent;
#interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie4_intc 0>,
+ <0 0 0 2 &pcie4_intc 1>,
+ <0 0 0 3 &pcie4_intc 2>,
+ <0 0 0 4 &pcie4_intc 3>;
linux,pci-domain = <4>;
@@ -171,6 +184,13 @@
phy-names = "pcie-phy";
msi-parent = <&v2m0>;
+ pcie4_intc: interrupt-controller {
+ compatible = "brcm,iproc-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
pcie8: pcie@60c00000 {
--
2.7.4
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prev parent reply other threads:[~2020-03-26 6:51 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-26 6:48 [PATCH v5 0/6] PAXB INTx support with proper model Srinath Mannam
2020-03-26 6:48 ` [PATCH v5 1/6] dt-bindings: pci: Update iProc PCI binding for INTx support Srinath Mannam
2020-03-26 12:37 ` Arnd Bergmann
2020-03-26 14:22 ` Bjorn Helgaas
2020-03-26 14:51 ` Marc Zyngier
2020-03-26 6:48 ` [PATCH v5 2/6] PCI: iproc: Add INTx support with better modeling Srinath Mannam
2020-03-26 12:34 ` Arnd Bergmann
2020-03-26 14:37 ` Andy Shevchenko
2020-03-26 15:03 ` Marc Zyngier
2020-03-26 6:48 ` [PATCH v5 3/6] arm: dts: Change PCIe INTx mapping for Cygnus Srinath Mannam
2020-03-26 6:48 ` [PATCH v5 4/6] arm: dts: Change PCIe INTx mapping for NSP Srinath Mannam
2020-03-26 6:48 ` [PATCH v5 5/6] arm: dts: Change PCIe INTx mapping for HR2 Srinath Mannam
2020-03-26 6:48 ` Srinath Mannam [this message]
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