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Wed, 22 Jul 2020 22:02:24 -0800 Received: from MTKMBS32N1.mediatek.inc (172.27.4.71) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 22 Jul 2020 23:02:23 -0700 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS32N1.mediatek.inc (172.27.4.71) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 23 Jul 2020 14:02:19 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 23 Jul 2020 14:02:20 +0800 Message-ID: <1595484072.16079.26.camel@mhfsdcap03> Subject: Re: [PATCH 1/4] i2c: mediatek: Add apdma sync in i2c driver From: Qii Wang To: Yingjoe Chen Date: Thu, 23 Jul 2020 14:01:12 +0800 In-Reply-To: <1595467756.7332.7.camel@mtksdaap41> References: <1595421106-10017-1-git-send-email-qii.wang@mediatek.com> <1595421106-10017-2-git-send-email-qii.wang@mediatek.com> <1595467756.7332.7.camel@mtksdaap41> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: 8508DC830B35E190FB92C244D835A81295A9C104BA53F0B154DA55D8789307C62000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200723_020232_032428_833DF3FD X-CRM114-Status: GOOD ( 23.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qiangming.xia@mediatek.com, devicetree@vger.kernel.org, srv_heupstream@mediatek.com, wsa@the-dreams.de, leilk.liu@mediatek.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-mediatek@lists.infradead.org, linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 2020-07-23 at 09:29 +0800, Yingjoe Chen wrote: > On Wed, 2020-07-22 at 20:31 +0800, Qii Wang wrote: > > With the apdma remove hand-shake signal, it need to keep i2c and > > apdma in sync manually. > > > > Looks good to me, > > Reviewed-by: Yingjoe Chen > > > Just a reminder, we have another patch 'i2c: mediatek: Add to support > continuous mode' under review now. Please remember to update OFFSET_CON > access code in that patch. > > Joe.C > > I and Qiangming are looking at whether the original multi-write code can cover it, After confirming again, then we will decide whether it need to send that patch. Thanks for your comments. > > > Signed-off-by: Qii Wang > > --- > > drivers/i2c/busses/i2c-mt65xx.c | 23 ++++++++++++++++++++--- > > 1 file changed, 20 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c > > index deef69e..e6b984a 100644 > > --- a/drivers/i2c/busses/i2c-mt65xx.c > > +++ b/drivers/i2c/busses/i2c-mt65xx.c > > @@ -48,6 +48,9 @@ > > > > #define I2C_DMA_CON_TX 0x0000 > > #define I2C_DMA_CON_RX 0x0001 > > +#define I2C_DMA_ASYNC_MODE 0x0004 > > +#define I2C_DMA_SKIP_CONFIG 0x0010 > > +#define I2C_DMA_DIR_CHANGE 0x0200 > > #define I2C_DMA_START_EN 0x0001 > > #define I2C_DMA_INT_FLAG_NONE 0x0000 > > #define I2C_DMA_CLR_FLAG 0x0000 > > @@ -205,6 +208,7 @@ struct mtk_i2c_compatible { > > unsigned char timing_adjust: 1; > > unsigned char dma_sync: 1; > > unsigned char ltiming_adjust: 1; > > + unsigned char apdma_sync: 1; > > }; > > > > struct mtk_i2c_ac_timing { > > @@ -311,6 +315,7 @@ struct i2c_spec_values { > > .timing_adjust = 1, > > .dma_sync = 0, > > .ltiming_adjust = 0, > > + .apdma_sync = 0, > > }; > > > > static const struct mtk_i2c_compatible mt6577_compat = { > > @@ -324,6 +329,7 @@ struct i2c_spec_values { > > .timing_adjust = 0, > > .dma_sync = 0, > > .ltiming_adjust = 0, > > + .apdma_sync = 0, > > }; > > > > static const struct mtk_i2c_compatible mt6589_compat = { > > @@ -337,6 +343,7 @@ struct i2c_spec_values { > > .timing_adjust = 0, > > .dma_sync = 0, > > .ltiming_adjust = 0, > > + .apdma_sync = 0, > > }; > > > > static const struct mtk_i2c_compatible mt7622_compat = { > > @@ -350,6 +357,7 @@ struct i2c_spec_values { > > .timing_adjust = 0, > > .dma_sync = 0, > > .ltiming_adjust = 0, > > + .apdma_sync = 0, > > }; > > > > static const struct mtk_i2c_compatible mt8173_compat = { > > @@ -362,6 +370,7 @@ struct i2c_spec_values { > > .timing_adjust = 0, > > .dma_sync = 0, > > .ltiming_adjust = 0, > > + .apdma_sync = 0, > > }; > > > > static const struct mtk_i2c_compatible mt8183_compat = { > > @@ -375,6 +384,7 @@ struct i2c_spec_values { > > .timing_adjust = 1, > > .dma_sync = 1, > > .ltiming_adjust = 1, > > + .apdma_sync = 0, > > }; > > > > static const struct of_device_id mtk_i2c_of_match[] = { > > @@ -798,6 +808,7 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs, > > u16 start_reg; > > u16 control_reg; > > u16 restart_flag = 0; > > + u16 dma_sync = 0; > > u32 reg_4g_mode; > > u8 *dma_rd_buf = NULL; > > u8 *dma_wr_buf = NULL; > > @@ -851,10 +862,16 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs, > > mtk_i2c_writew(i2c, num, OFFSET_TRANSAC_LEN); > > } > > > > + if (i2c->dev_comp->apdma_sync) { > > + dma_sync = I2C_DMA_SKIP_CONFIG | I2C_DMA_ASYNC_MODE; > > + if (i2c->op == I2C_MASTER_WRRD) > > + dma_sync |= I2C_DMA_DIR_CHANGE; > > + } > > + > > /* Prepare buffer data to start transfer */ > > if (i2c->op == I2C_MASTER_RD) { > > writel(I2C_DMA_INT_FLAG_NONE, i2c->pdmabase + OFFSET_INT_FLAG); > > - writel(I2C_DMA_CON_RX, i2c->pdmabase + OFFSET_CON); > > + writel(I2C_DMA_CON_RX | dma_sync, i2c->pdmabase + OFFSET_CON); > > > > dma_rd_buf = i2c_get_dma_safe_msg_buf(msgs, 1); > > if (!dma_rd_buf) > > @@ -877,7 +894,7 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs, > > writel(msgs->len, i2c->pdmabase + OFFSET_RX_LEN); > > } else if (i2c->op == I2C_MASTER_WR) { > > writel(I2C_DMA_INT_FLAG_NONE, i2c->pdmabase + OFFSET_INT_FLAG); > > - writel(I2C_DMA_CON_TX, i2c->pdmabase + OFFSET_CON); > > + writel(I2C_DMA_CON_TX | dma_sync, i2c->pdmabase + OFFSET_CON); > > > > dma_wr_buf = i2c_get_dma_safe_msg_buf(msgs, 1); > > if (!dma_wr_buf) > > @@ -900,7 +917,7 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs, > > writel(msgs->len, i2c->pdmabase + OFFSET_TX_LEN); > > } else { > > writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_INT_FLAG); > > - writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_CON); > > + writel(I2C_DMA_CLR_FLAG | dma_sync, i2c->pdmabase + OFFSET_CON); > > > > dma_wr_buf = i2c_get_dma_safe_msg_buf(msgs, 1); > > if (!dma_wr_buf) > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel