From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A000C433E3 for ; Tue, 28 Jul 2020 09:21:29 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4BA53206F5 for ; Tue, 28 Jul 2020 09:21:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="BrPszshx"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="S3EP0Kuw" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4BA53206F5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:References:In-Reply-To:Message-Id:Date:Subject:To: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=nag4a395Hq0AmAdb+sZFx+C70qLdJQHPrXtMOhSHRdE=; b=BrPszshxKkNsVTih7/j+rUS+W3 eCggukexiVrRGqqDZgwC3kUbF1pZbTmNY9e9FPF60M32rogPeX5/SRt865M/hxDDaqclioyYzJUE5 y0WesWJcE7hhAnk+PYq5RyhhLNKBKYRlh/3Rs8y0UggMmgROSfH8WIky6r5Kcc9x319SLRIuIPIWk pausI7xR64BUrt4CeorSfhRcEnFVHzgITaJBo6FoOkV26bmM6mPiJU1ynhCFJgJehJciPvvUb2IJW 0tnhafl17xD2nneUsVen1X9fZGGyQ9UG25n9VgUSkAY2WOEIHNCDP/qkFiCAh0voCUMnmSn8BGTaW ZaL+4RmQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k0LmI-0005sh-ES; Tue, 28 Jul 2020 09:20:06 +0000 Received: from mail-lf1-x144.google.com ([2a00:1450:4864:20::144]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k0Lm8-0005qV-EF for linux-arm-kernel@lists.infradead.org; Tue, 28 Jul 2020 09:19:57 +0000 Received: by mail-lf1-x144.google.com with SMTP id k13so10643064lfo.0 for ; Tue, 28 Jul 2020 02:19:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Ipzuo+HQ11391SYa3h/EWapjP3MjJlhfg4aV9wFpeFU=; b=S3EP0KuwN1R6cnsfr0mYO/fkbWqWX9PjdYAhnw/6+6OAfhsGKEI3lBxmKCxl5RV4Ds DIvtdClTy7q3UqdQAeRNc0nioS+I4y5Sp2oMo+8g442wp4GoC2ojKpX/W5LJEQcfE3zW fp+MCZ4jOu0M3YLsVVpMWqTkv8BpEDhUkq4oOlk4dpWXbsX+U6AMRjQg2/bvHLJfH7nG uv92PMdBh5XQVsyqFhbUN4pUPql9iTancya47t9akY9SUucx/yCATPLkC9hvoNmHetcN WUHxBU34PA6LqwE6T5v61DEU0CqDuE1WRYgKrIM0MqeUzetLjGjLrNALCn16ebwXfwrM Xchg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Ipzuo+HQ11391SYa3h/EWapjP3MjJlhfg4aV9wFpeFU=; b=duOsqY01vo71Jy0sUxjv4+zUodrw2ZT3wAhwqD1D+hspnQqTC/kl4vUdCrSOzaeuOq TNHUqQyMplL5bCvDDqvkf/ylSWuZga9sD/0WCfOEB0/IGF14BBPoSOi3uLKd6te23qZL vZhLMOYDLYn2qC8oRZmrUoEB5dfQx+Nz+d7Dc99IC1jfTagGOp8IToJa8hnqzkYuRe3y LuMDGYI0jH7p4CD4nukISspsbhcmppc8Al1ZlAyT/wfxwGp11bM+zHxjxAQyqDJVauk2 83u9qfxyfjDu4XmARtXD65oidrEnKPSFtjLFaikcjmUaYNOlnw4GJsI1umT5kE6jtmY9 XmDg== X-Gm-Message-State: AOAM532MzlmwmNwpfUG9BaC/aCOZRjdfQV3gNnPPWqtS9z99pFiJo5tw ZUA4Sig9Gb26+/FxP7Rqvj9DkQ== X-Google-Smtp-Source: ABdhPJw7TRYfLEcTS7i+LwRZ8WalnQMd4VKzKP026t75kh3SzVtx7ptw+ROhxSDR7gi6zGUlOpvc7Q== X-Received: by 2002:a05:6512:1084:: with SMTP id j4mr3610787lfg.96.1595927994616; Tue, 28 Jul 2020 02:19:54 -0700 (PDT) Received: from gilgamesh.semihalf.com (193-106-246-138.noc.fibertech.net.pl. [193.106.246.138]) by smtp.gmail.com with ESMTPSA id q22sm3643270lfc.33.2020.07.28.02.19.53 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 28 Jul 2020 02:19:54 -0700 (PDT) From: Grzegorz Jaszczyk To: tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org, s-anna@ti.com Subject: [PATCH v4 3/5] irqchip/irq-pruss-intc: Add logic for handling reserved interrupts Date: Tue, 28 Jul 2020 11:18:36 +0200 Message-Id: <1595927918-19845-4-git-send-email-grzegorz.jaszczyk@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1595927918-19845-1-git-send-email-grzegorz.jaszczyk@linaro.org> References: <1595927918-19845-1-git-send-email-grzegorz.jaszczyk@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200728_051956_659362_12D857F9 X-CRM114-Status: GOOD ( 23.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, grzegorz.jaszczyk@linaro.org, david@lechnology.com, praneeth@ti.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-omap@vger.kernel.org, lee.jones@linaro.org, wmills@ti.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Suman Anna The PRUSS INTC has a fixed number of output interrupt lines that are connected to a number of processors or other PRUSS instances or other devices (like DMA) on the SoC. The output interrupt lines 2 through 9 are usually connected to the main Arm host processor and are referred to as host interrupts 0 through 7 from ARM/MPU perspective. All of these 8 host interrupts are not always exclusively connected to the Arm interrupt controller. Some SoCs have some interrupt lines not connected to the Arm interrupt controller at all, while a few others have the interrupt lines connected to multiple processors in which they need to be partitioned as per SoC integration needs. For example, AM437x and 66AK2G SoCs have 2 PRUSS instances each and have the host interrupt 5 connected to the other PRUSS, while AM335x has host interrupt 0 shared between MPU and TSC_ADC and host interrupts 6 & 7 shared between MPU and a DMA controller. Add logic to the PRUSS INTC driver to ignore both these shared and invalid interrupts. Signed-off-by: Suman Anna Signed-off-by: Grzegorz Jaszczyk --- v3->v4: - Due to changes in DT bindings which converts irqs-reserved property from uint8-array to bitmask requested by Rob introduce relevant changes in the driver. - Merge the irqs-reserved and irqs-shared to one property since they can be handled by one logic (relevant change was introduced to DT binding). - Update commit message. v2->v3: - Extra checks for (intc->irqs[i]) in error/remove path was moved from "irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts" to this patch v1->v2: - https://patchwork.kernel.org/patch/11069757/ --- drivers/irqchip/irq-pruss-intc.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/irq-pruss-intc.c b/drivers/irqchip/irq-pruss-intc.c index 45b966a..cf9a59b 100644 --- a/drivers/irqchip/irq-pruss-intc.c +++ b/drivers/irqchip/irq-pruss-intc.c @@ -474,7 +474,7 @@ static int pruss_intc_probe(struct platform_device *pdev) struct pruss_intc *intc; struct pruss_host_irq_data *host_data[MAX_NUM_HOST_IRQS] = { NULL }; int i, irq, ret; - u8 max_system_events; + u8 max_system_events, invalid_intr = 0; data = of_device_get_match_data(dev); if (!data) @@ -496,6 +496,16 @@ static int pruss_intc_probe(struct platform_device *pdev) return PTR_ERR(intc->base); } + ret = of_property_read_u8(dev->of_node, "ti,irqs-reserved", + &invalid_intr); + + /* + * The irqs-reserved is used only for some SoC's therefore not having + * this property is still valid + */ + if (ret < 0 && ret != -EINVAL) + return ret; + pruss_intc_init(intc); mutex_init(&intc->lock); @@ -506,6 +516,9 @@ static int pruss_intc_probe(struct platform_device *pdev) return -ENOMEM; for (i = 0; i < MAX_NUM_HOST_IRQS; i++) { + if (invalid_intr & BIT(i)) + continue; + irq = platform_get_irq_byname(pdev, irq_names[i]); if (irq <= 0) { dev_err(dev, "platform_get_irq_byname failed for %s : %d\n", @@ -533,8 +546,11 @@ static int pruss_intc_probe(struct platform_device *pdev) return 0; fail_irq: - while (--i >= 0) - irq_set_chained_handler_and_data(intc->irqs[i], NULL, NULL); + while (--i >= 0) { + if (intc->irqs[i]) + irq_set_chained_handler_and_data(intc->irqs[i], NULL, + NULL); + } irq_domain_remove(intc->domain); @@ -548,8 +564,11 @@ static int pruss_intc_remove(struct platform_device *pdev) unsigned int hwirq; int i; - for (i = 0; i < MAX_NUM_HOST_IRQS; i++) - irq_set_chained_handler_and_data(intc->irqs[i], NULL, NULL); + for (i = 0; i < MAX_NUM_HOST_IRQS; i++) { + if (intc->irqs[i]) + irq_set_chained_handler_and_data(intc->irqs[i], NULL, + NULL); + } for (hwirq = 0; hwirq < max_system_events; hwirq++) irq_dispose_mapping(irq_find_mapping(intc->domain, hwirq)); -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel