From: Qi Liu <liuqi115@huawei.com>
To: <gregkh@linuxfoundation.org>, <saiprakash.ranjan@codeaurora.org>,
<suzuki.poulose@arm.com>
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linuxarm@huawei.com
Subject: [PATCH] coresight: etm4x: Modify core-commit of cpu to avoid the overflow of HiSilicon ETM
Date: Mon, 3 Aug 2020 21:40:42 +0800 [thread overview]
Message-ID: <1596462042-28026-1-git-send-email-liuqi115@huawei.com> (raw)
When too much trace information is generated on-chip, the ETM will
overflow, and may cause data loss. This is a common phenomenon on
ETM devices.
But sometimes we do not want to lose any performance trace data, so
we suppress the speed of instructions sent from CPU core to ETM to
avoid the overflow of ETM.
Signed-off-by: Qi Liu <liuqi115@huawei.com>
---
drivers/hwtracing/coresight/coresight-etm4x.c | 46 +++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 4a4f0bd..ca9fb11 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -43,6 +43,11 @@ MODULE_PARM_DESC(boot_enable, "Enable tracing on boot");
#define PARAM_PM_SAVE_NEVER 1 /* never save any state */
#define PARAM_PM_SAVE_SELF_HOSTED 2 /* save self-hosted state only */
+#define CORE_COMMIT_CLEAR 0x3000
+#define CORE_COMMIT_SHIFT 12
+#define HISI_ETM_AMBA_ID_V1 0x000b6d01
+#define HISI_ETM_AMBA_ID_V2 0x000b6d02
+
static int pm_save_enable = PARAM_PM_SAVE_FIRMWARE;
module_param(pm_save_enable, int, 0444);
MODULE_PARM_DESC(pm_save_enable,
@@ -104,11 +109,41 @@ struct etm4_enable_arg {
int rc;
};
+static void etm4_cpu_actlr1_cfg(void *info)
+{
+ struct etm4_enable_arg *arg = (struct etm4_enable_arg *)info;
+ u64 val;
+
+ asm volatile("mrs %0,s3_1_c15_c2_5" : "=r"(val));
+ val &= ~CORE_COMMIT_CLEAR;
+ val |= arg->rc << CORE_COMMIT_SHIFT;
+ asm volatile("msr s3_1_c15_c2_5,%0" : : "r"(val));
+}
+
+static void etm4_config_core_commit(int cpu, int val)
+{
+ struct etm4_enable_arg arg = {0};
+
+ arg.rc = val;
+ smp_call_function_single(cpu, etm4_cpu_actlr1_cfg, &arg, 1);
+}
+
static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
{
int i, rc;
+ struct amba_device *adev;
struct etmv4_config *config = &drvdata->config;
struct device *etm_dev = &drvdata->csdev->dev;
+ struct device *dev = drvdata->csdev->dev.parent;
+
+ adev = container_of(dev, struct amba_device, dev);
+ /*
+ * If ETM device is HiSilicon ETM device, reduce the
+ * core-commit to avoid ETM overflow.
+ */
+ if (adev->periphid == HISI_ETM_AMBA_ID_V1 ||
+ adev->periphid == HISI_ETM_AMBA_ID_V2)
+ etm4_config_core_commit(drvdata->cpu, 1);
CS_UNLOCK(drvdata->base);
@@ -469,11 +504,22 @@ static int etm4_enable(struct coresight_device *csdev,
static void etm4_disable_hw(void *info)
{
u32 control;
+ struct amba_device *adev;
struct etmv4_drvdata *drvdata = info;
struct etmv4_config *config = &drvdata->config;
struct device *etm_dev = &drvdata->csdev->dev;
+ struct device *dev = drvdata->csdev->dev.parent;
int i;
+ adev = container_of(dev, struct amba_device, dev);
+ /*
+ * If ETM device is HiSilicon ETM device, resume the
+ * core-commit after ETM trace is complete.
+ */
+ if (adev->periphid == HISI_ETM_AMBA_ID_V1 ||
+ adev->periphid == HISI_ETM_AMBA_ID_V2)
+ etm4_config_core_commit(drvdata->cpu, 0);
+
CS_UNLOCK(drvdata->base);
/* power can be removed from the trace unit now */
--
2.8.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2020-08-03 13:43 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-03 13:40 Qi Liu [this message]
2020-09-03 11:37 [PATCH] coresight: etm4x: Modify core-commit of cpu to avoid the overflow of HiSilicon ETM Qi Liu
2020-11-23 13:29 Qi Liu
2020-11-23 14:12 ` Suzuki K Poulose
2020-11-26 13:38 ` Qi Liu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1596462042-28026-1-git-send-email-liuqi115@huawei.com \
--to=liuqi115@huawei.com \
--cc=gregkh@linuxfoundation.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=saiprakash.ranjan@codeaurora.org \
--cc=suzuki.poulose@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).